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Searched refs:mode_mask (Results 1 – 25 of 46) sorted by relevance

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/linux/arch/arm/mach-davinci/
A Dmux.h18 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
25 .mask = mode_mask, \
29 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
36 .mask = mode_mask, \
40 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
47 .mask = mode_mask, \
/linux/drivers/media/v4l2-core/
A Dtuner-core.c340 t->mode_mask = T_RADIO; in set_type()
346 t->mode_mask = T_RADIO; in set_type()
496 t->mode_mask); in set_type()
529 tun_setup->mode_mask, in tuner_s_type_addr()
533 (t->mode_mask & tun_setup->mode_mask))) || in tuner_s_type_addr()
539 t->type, t->mode_mask, in tuner_s_type_addr()
595 int mode_mask; in tuner_lookup() local
601 mode_mask = pos->mode_mask; in tuner_lookup()
668 t->mode_mask = T_RADIO; in tuner_probe()
698 t->mode_mask = T_RADIO; in tuner_probe()
[all …]
/linux/drivers/regulator/
A Dhi6421-regulator.c40 u8 mode_mask; member
149 .mode_mask = ecomask, \
189 .mode_mask = ecomask, \
229 .mode_mask = ecomask, \
266 .mode_mask = sleepmask, \
302 .mode_mask = sleepmask, \
392 if (reg_val & info->mode_mask) in hi6421_regulator_ldo_get_mode()
405 if (reg_val & info->mode_mask) in hi6421_regulator_buck_get_mode()
423 new_mode = info->mode_mask; in hi6421_regulator_ldo_set_mode()
431 info->mode_mask, new_mode); in hi6421_regulator_ldo_set_mode()
[all …]
A Dhi6421v530-regulator.c28 u8 mode_mask; member
92 .mode_mask = ecomask, \
120 if (reg_val & (info->mode_mask)) in hi6421v530_regulator_ldo_get_mode()
138 new_mode = info->mode_mask; in hi6421v530_regulator_ldo_set_mode()
145 info->mode_mask, new_mode); in hi6421v530_regulator_ldo_set_mode()
A Dfan53555.c127 unsigned int mode_mask; member
182 di->mode_mask, di->mode_mask); in fan53555_set_mode()
185 regmap_update_bits(rdev->regmap, di->vol_reg, di->mode_mask, 0); in fan53555_set_mode()
202 if (val & di->mode_mask) in fan53555_get_mode()
423 di->mode_mask = CTL_MODE_VSEL1_MODE; in fan53555_device_setup()
426 di->mode_mask = CTL_MODE_VSEL0_MODE; in fan53555_device_setup()
433 di->mode_mask = VSEL_MODE; in fan53555_device_setup()
440 di->mode_mask = TCS_VSEL1_MODE; in fan53555_device_setup()
443 di->mode_mask = TCS_VSEL0_MODE; in fan53555_device_setup()
A Das3722-regulator.c56 u8 mode_mask; member
86 .mode_mask = AS3722_SD0_MODE_FAST,
98 .mode_mask = AS3722_SD1_MODE_FAST,
111 .mode_mask = AS3722_SD2_MODE_FAST,
125 .mode_mask = AS3722_SD3_MODE_FAST,
139 .mode_mask = AS3722_SD4_MODE_FAST,
153 .mode_mask = AS3722_SD5_MODE_FAST,
166 .mode_mask = AS3722_SD6_MODE_FAST,
437 if (val & as3722_reg_lookup[id].mode_mask) in as3722_sd_get_mode()
457 val = as3722_reg_lookup[id].mode_mask; in as3722_sd_set_mode()
[all …]
A Dmt6360-regulator.c38 unsigned int mode_mask; member
225 int shift = ffs(rdesc->mode_mask) - 1; in mt6360_regulator_set_mode()
243 ret = regmap_update_bits(regmap, rdesc->mode_reg, rdesc->mode_mask, val << shift); in mt6360_regulator_set_mode()
256 int shift = ffs(rdesc->mode_mask) - 1; in mt6360_regulator_get_mode()
264 val &= rdesc->mode_mask; in mt6360_regulator_get_mode()
346 .mode_mask = mmask, \
A Drtq2134-regulator.c67 unsigned int mode_mask; member
90 val <<= ffs(desc->mode_mask) - 1; in rtq2134_buck_set_mode()
91 return regmap_update_bits(rdev->regmap, desc->mode_reg, desc->mode_mask, in rtq2134_buck_set_mode()
106 if (mode & desc->mode_mask) in rtq2134_buck_get_mode()
296 .mode_mask = RTQ2134_FCCM_MASK, \
A Dab8500.c191 u8 mode_mask; member
412 if (info->mode_mask) { in ab8500_regulator_set_mode()
415 mask = info->mode_mask; in ab8500_regulator_set_mode()
430 if (info->mode_mask) in ab8500_regulator_set_mode()
449 if (info->mode_mask) in ab8500_regulator_set_mode()
459 if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) { in ab8500_regulator_set_mode()
475 if (!info->mode_mask) in ab8500_regulator_set_mode()
509 if (info->mode_mask) { in ab8500_regulator_get_mode()
513 val = val & info->mode_mask; in ab8500_regulator_get_mode()
1078 .mode_mask = 0x04,
[all …]
A Dcpcap-regulator.c106 mode_mask, volt_mask, mode_val, off_val, \ argument
121 .enable_mask = (mode_mask), \
/linux/drivers/input/misc/
A Dati_remote2.c99 static unsigned int mode_mask = ATI_REMOTE2_MAX_MODE_MASK; variable
105 module_param(mode_mask, mode_mask, 0644);
106 MODULE_PARM_DESC(mode_mask, "Bitmask of modes to accept <4:PC><3:AUX4><2:AUX3><1:AUX2><0:AUX1>");
204 unsigned int mode_mask; member
328 if (!((1 << mode) & ar2->mode_mask)) in ati_remote2_input_mouse()
383 if (!((1 << mode) & ar2->mode_mask)) in ati_remote2_input_key()
758 return sprintf(buf, "0x%02x\n", ar2->mode_mask); in ati_remote2_show_mode_mask()
778 ar2->mode_mask = mask; in ati_remote2_store_mode_mask()
786 static DEVICE_ATTR(mode_mask, 0644, ati_remote2_show_mode_mask,
853 ar2->mode_mask = mode_mask; in ati_remote2_probe()
/linux/drivers/media/usb/au0828/
A Dau0828-cards.c207 unsigned int mode_mask = T_ANALOG_TV; in au0828_card_analog_fe_setup() local
227 tun_setup.mode_mask = mode_mask; in au0828_card_analog_fe_setup()
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_sspp.c172 u32 mode_mask; in dpu_hw_sspp_setup_multirect() local
184 mode_mask = 0; in dpu_hw_sspp_setup_multirect()
186 mode_mask = DPU_REG_READ(&ctx->hw, SSPP_MULTIRECT_OPMODE + idx); in dpu_hw_sspp_setup_multirect()
187 mode_mask |= index; in dpu_hw_sspp_setup_multirect()
189 mode_mask |= BIT(2); in dpu_hw_sspp_setup_multirect()
191 mode_mask &= ~BIT(2); in dpu_hw_sspp_setup_multirect()
194 DPU_REG_WRITE(&ctx->hw, SSPP_MULTIRECT_OPMODE + idx, mode_mask); in dpu_hw_sspp_setup_multirect()
/linux/drivers/media/cec/core/
A Dcec-pin-error-inj.c196 u64 mode_mask; in cec_pin_error_inj_parse_line() local
204 mode_mask = CEC_ERROR_INJ_MODE_MASK << mode_offset; in cec_pin_error_inj_parse_line()
231 *error &= ~mode_mask; in cec_pin_error_inj_parse_line()
/linux/drivers/memstick/host/
A Dtifm_ms.c72 unsigned int mode_mask; member
304 writel(host->mode_mask | TIFM_MS_SYS_FIFO, in tifm_ms_issue_cmd()
505 host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI; in tifm_ms_set_param()
519 host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI; in tifm_ms_set_param()
524 host->mode_mask = 0; in tifm_ms_set_param()
/linux/drivers/hwmon/
A Dnct7802.c1059 struct device_node *node, u8 *mode_mask, in nct7802_get_channel_config() argument
1086 *mode_mask |= MODE_LTD_EN; in nct7802_get_channel_config()
1094 *mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1); in nct7802_get_channel_config()
1106 *mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1); in nct7802_get_channel_config()
1138 *mode_mask |= MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1); in nct7802_get_channel_config()
1147 u8 mode_mask = MODE_LTD_EN, mode_val = MODE_LTD_EN; in nct7802_configure_channels() local
1153 err = nct7802_get_channel_config(dev, node, &mode_mask, in nct7802_configure_channels()
1162 return regmap_update_bits(data->regmap, REG_MODE, mode_mask, mode_val); in nct7802_configure_channels()
/linux/drivers/pinctrl/mediatek/
A Dpinctrl-mt6397.c36 .mode_mask = 0xf,
A Dpinctrl-mtk-common.c76 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_pmx_gpio_set_direction()
98 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_gpio_set()
142 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_pconf_set_ies_smt()
313 bit = BIT(pin & pctl->devdata->mode_mask); in mtk_pconf_set_pull_select()
800 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_gpio_get_direction()
822 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_gpio_get()
A Dpinctrl-mtk-common.h257 unsigned int mode_mask; member
A Dpinctrl-mt8127.c295 .mode_mask = 0xf,
A Dpinctrl-mt8167.c327 .mode_mask = 0xf,
A Dpinctrl-mt8516.c327 .mode_mask = 0xf,
A Dpinctrl-mt8173.c335 .mode_mask = 0xf,
/linux/include/media/
A Dtuner.h221 unsigned int mode_mask; member
/linux/drivers/gpu/drm/hisilicon/kirin/
A Ddw_drm_dsi.c516 u32 mode_mask = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | in dsi_set_video_mode() local
525 if ((flags & mode_mask) == non_burst_sync_pulse) in dsi_set_video_mode()
527 else if ((flags & mode_mask) == non_burst_sync_event) in dsi_set_video_mode()

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