| /linux/drivers/media/cec/core/ |
| A D | cec-pin-error-inj.c | 14 unsigned int mode_offset; member
195 unsigned int mode_offset; in cec_pin_error_inj_parse_line() local
203 mode_offset = cec_error_inj_cmds[i].mode_offset; in cec_pin_error_inj_parse_line()
204 mode_mask = CEC_ERROR_INJ_MODE_MASK << mode_offset; in cec_pin_error_inj_parse_line()
207 if (mode_offset == CEC_ERROR_INJ_RX_ARB_LOST_OFFSET) { in cec_pin_error_inj_parse_line()
225 if ((mode_offset == CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET || in cec_pin_error_inj_parse_line()
226 mode_offset == CEC_ERROR_INJ_TX_LONG_BIT_OFFSET || in cec_pin_error_inj_parse_line()
232 *error |= (u64)mode << mode_offset; in cec_pin_error_inj_parse_line()
317 unsigned int mode_offset; in cec_pin_error_inj_show() local
320 mode_offset = cec_error_inj_cmds[j].mode_offset; in cec_pin_error_inj_show()
[all …]
|
| A D | cec-pin.c | 156 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in rx_error_inj() argument
162 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK; in rx_error_inj()
176 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset); in rx_error_inj()
218 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in tx_error_inj() argument
224 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK; in tx_error_inj()
238 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset); in tx_error_inj()
|
| /linux/arch/arm/mach-omap1/include/mach/ |
| A D | mux.h | 27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ argument
29 .mask_offset = mode_offset, \
43 .mask_offset = mode_offset, \
53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ argument
54 .mask_offset = mode_offset, \
64 #define MUX_REG_7XX(reg, mode_offset, mode) \ argument
66 .mask_offset = mode_offset, \
75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument
81 MUX_REG(mux_reg, mode_offset, mode) \
94 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ argument
[all …]
|
| /linux/arch/arm/mach-davinci/ |
| A D | mux.h | 18 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
24 .mask_offset = mode_offset, \
29 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
35 .mask_offset = mode_offset, \
40 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
46 .mask_offset = mode_offset, \
|
| /linux/include/linux/ |
| A D | pktcdvd.h | 174 __u8 mode_offset; /* 0 / 8 */ member
|
| /linux/drivers/clk/rockchip/ |
| A D | clk.h | 320 int mode_offset; member
340 .mode_offset = _mode, \
351 int lock_shift, int mode_offset, int mode_shift,
|
| A D | clk-pll.c | 853 int lock_shift, int mode_offset, int mode_shift, in rockchip_clk_register_pll() argument
880 pll_mux->reg = ctx->reg_base + mode_offset; in rockchip_clk_register_pll()
|
| A D | clk.c | 416 list->lock_shift, list->mode_offset, in rockchip_clk_register_plls()
|
| /linux/drivers/net/wireless/ath/ath5k/ |
| A D | eeprom.c | 470 u32 mode_offset[3]; in ath5k_eeprom_init_modes() local
478 mode_offset[AR5K_EEPROM_MODE_11A] = AR5K_EEPROM_MODES_11A(ah->ah_ee_version); in ath5k_eeprom_init_modes()
479 mode_offset[AR5K_EEPROM_MODE_11B] = AR5K_EEPROM_MODES_11B(ah->ah_ee_version); in ath5k_eeprom_init_modes()
480 mode_offset[AR5K_EEPROM_MODE_11G] = AR5K_EEPROM_MODES_11G(ah->ah_ee_version); in ath5k_eeprom_init_modes()
486 offset = mode_offset[mode]; in ath5k_eeprom_init_modes()
|
| /linux/drivers/block/ |
| A D | pktcdvd.c | 1644 pd->mode_offset = (buffer[6] << 8) | (buffer[7] & 0xff); in pkt_set_write_settings()
1662 wp = (write_param_page *) &buffer[sizeof(struct mode_page_header) + pd->mode_offset]; in pkt_set_write_settings()
1896 cgc.buflen = pd->mode_offset + 12; in pkt_write_caching()
1907 buf[pd->mode_offset + 10] |= (!!set << 2); in pkt_write_caching()
1941 cap_buf = &buf[sizeof(struct mode_page_header) + pd->mode_offset]; in pkt_get_max_speed()
1947 cgc.buflen = pd->mode_offset + cap_buf[1] + 2 + in pkt_get_max_speed()
2517 seq_printf(m, "\tmode page offset:\t%u\n", pd->mode_offset); in pkt_seq_show()
|