| /linux/drivers/clk/mstar/ |
| A D | clk-msc313-mpll.c | 74 struct msc313_mpll *mpll; in msc313_mpll_probe() local
82 mpll = devm_kzalloc(dev, sizeof(*mpll), GFP_KERNEL); in msc313_mpll_probe()
83 if (!mpll) in msc313_mpll_probe()
95 if (IS_ERR(mpll->input_div)) in msc313_mpll_probe()
96 return PTR_ERR(mpll->input_div); in msc313_mpll_probe()
98 if (IS_ERR(mpll->output_div)) in msc313_mpll_probe()
107 mpll->clk_data = devm_kzalloc(dev, struct_size(mpll->clk_data, hws, in msc313_mpll_probe()
109 if (!mpll->clk_data) in msc313_mpll_probe()
116 mpll->clk_hw.init = &clk_init; in msc313_mpll_probe()
123 mpll->clk_data->hws[0] = &mpll->clk_hw; in msc313_mpll_probe()
[all …]
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| A D | Makefile | 6 obj-$(CONFIG_MSTAR_MSC313_MPLL) += clk-msc313-mpll.o
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| /linux/drivers/clk/meson/ |
| A D | clk-mpll.c | 84 n2 = meson_parm_read(clk->map, &mpll->n2); in mpll_recalc_rate()
113 if (mpll->lock) in mpll_set_rate()
114 spin_lock_irqsave(mpll->lock, flags); in mpll_set_rate()
116 __acquire(mpll->lock); in mpll_set_rate()
122 meson_parm_write(clk->map, &mpll->n2, n2); in mpll_set_rate()
124 if (mpll->lock) in mpll_set_rate()
127 __release(mpll->lock); in mpll_set_rate()
137 if (mpll->init_count) in mpll_init()
139 mpll->init_count); in mpll_init()
145 if (MESON_PARM_APPLICABLE(&mpll->ssen)) { in mpll_init()
[all …]
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| A D | built-in.a | 7 clk-mpll.o/
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| A D | .clk-mpll.o.cmd | 1 …mpll.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aar…
3 source_drivers/clk/meson/clk-mpll.o := drivers/clk/meson/clk-mpll.c
5 deps_drivers/clk/meson/clk-mpll.o := \
943 drivers/clk/meson/clk-mpll.h \
946 drivers/clk/meson/clk-mpll.o: $(deps_drivers/clk/meson/clk-mpll.o)
948 $(deps_drivers/clk/meson/clk-mpll.o):
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| A D | Makefile | 8 obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
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| A D | .built-in.a.cmd | 1 …meson/clk-dualdiv.o drivers/clk/meson/meson-eeclk.o drivers/clk/meson/clk-mpll.o drivers/clk/meson…
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| /linux/drivers/gpu/drm/radeon/ |
| A D | radeon_clocks.c | 72 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock() local
78 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock()
112 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF() local
187 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_get_clock_info() local
219 if (mpll->reference_div < 2) in radeon_get_clock_info()
332 mpll->min_post_div = 1; in radeon_get_clock_info()
333 mpll->max_post_div = 1; in radeon_get_clock_info()
334 mpll->min_ref_div = 2; in radeon_get_clock_info()
335 mpll->max_ref_div = 0xff; in radeon_get_clock_info()
336 mpll->min_feedback_div = 4; in radeon_get_clock_info()
[all …]
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| /linux/Documentation/devicetree/bindings/clock/ |
| A D | mstar,msc313-mpll.yaml | 4 $id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
20 const: mstar,msc313-mpll
41 mpll@206000 {
42 compatible = "mstar,msc313-mpll";
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| A D | imx35-clock.yaml | 20 mpll 1
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| A D | imx31-clock.yaml | 22 mpll 3
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_atomfirmware.c | 535 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atomfirmware_get_clock_info() local
591 mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
593 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
594 mpll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
595 mpll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
596 mpll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
597 mpll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
598 mpll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()
599 mpll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
600 mpll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
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| A D | amdgpu_atombios.c | 571 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atombios_get_clock_info() local
643 mpll->reference_freq = in amdgpu_atombios_get_clock_info()
645 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()
647 mpll->pll_out_min = in amdgpu_atombios_get_clock_info()
649 mpll->pll_out_max = in amdgpu_atombios_get_clock_info()
656 mpll->pll_in_min = in amdgpu_atombios_get_clock_info()
658 mpll->pll_in_max = in amdgpu_atombios_get_clock_info()
666 mpll->min_post_div = 1; in amdgpu_atombios_get_clock_info()
667 mpll->max_post_div = 1; in amdgpu_atombios_get_clock_info()
668 mpll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| A D | nv04.c | 288 bool mpll = Preg == 0x4020; in setPLL_double_lowregs() local
291 uint32_t Pval = (oldPval & (mpll ? ~(0x77 << 16) : ~(7 << 16))) | in setPLL_double_lowregs()
306 if (mpll) { in setPLL_double_lowregs()
322 Pval |= mpll ? 1 << 12 : 1 << 8; in setPLL_double_lowregs()
326 if (mpll) { in setPLL_double_lowregs()
340 if (mpll) { in setPLL_double_lowregs()
349 if (mpll) { in setPLL_double_lowregs()
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| /linux/arch/arm/boot/dts/ |
| A D | mstar-v7.dtsi | 9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
151 mpll: mpll@206000 { label
152 compatible = "mstar,msc313-mpll";
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| /linux/arch/arm/mach-s3c/ |
| A D | cpufreq-utils-s3c24xx.c | 60 if (!IS_ERR(cfg->mpll)) in s3c2410_set_fvco()
61 clk_set_rate(cfg->mpll, cfg->pll.frequency); in s3c2410_set_fvco()
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| /linux/drivers/clk/samsung/ |
| A D | clk-s3c2410.c | 35 mpll, upll, enumerator
155 [mpll] = PLL(pll_s3c2410_mpll, MPLL, "mpll", "xti",
221 [mpll] = PLL(pll_s3c2440_mpll, MPLL, "mpll", "xti",
342 s3c2410_plls[mpll].rate_table = pll_s3c2410_12mhz_tbl; in s3c2410_common_clk_init()
356 s3c244x_common_plls[mpll].rate_table = in s3c2410_common_clk_init()
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| A D | clk-exynos5410.c | 61 apll, cpll, epll, mpll, enumerator
246 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK,
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| A D | clk-s5pv210.c | 69 mpll, enumerator
718 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll",
730 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll",
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| /linux/Documentation/devicetree/bindings/phy/ |
| A D | qcom,ipq806x-usb-phy-ss.yaml | 49 qcom,mpll:
51 description: Override value for mpll.
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| /linux/arch/arm64/boot/dts/sprd/ |
| A D | sharkl3.dtsi | 91 mpll: mpll { label
92 compatible = "sprd,sc9863a-mpll";
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| /linux/drivers/phy/qualcomm/ |
| A D | phy-qcom-ipq806x-usb.c | 121 u32 mpll; member
412 data |= SSPHY_MPLL(phy_dwc3->mpll); in qcom_ipq806x_usb_ss_phy_init()
538 if (device_property_read_u32(&pdev->dev, "qcom,mpll", &phy_dwc3->mpll)) in qcom_ipq806x_usb_phy_probe()
539 phy_dwc3->mpll = SSPHY_MPLL_VALUE; in qcom_ipq806x_usb_phy_probe()
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| A D | ramnv50.c | 225 struct nvbios_pll mpll; in nv50_ram_calc() local
327 ret = nvbios_pll_parse(bios, 0x004008, &mpll); in nv50_ram_calc()
328 mpll.vco2.max_freq = 0; in nv50_ram_calc()
330 ret = nv04_pll_calc(subdev, &mpll, freq, in nv50_ram_calc()
348 r004008 |= (mpll.bias_p << 19) | (P << 22) | (P << 16); in nv50_ram_calc()
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| /linux/drivers/clk/imx/ |
| A D | clk-imx35.c | 65 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
109 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL); in _mx35_clocks_init()
112 clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4); in _mx35_clocks_init()
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| A D | clk-imx31.c | 40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
59 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "mpll", "ckih", base + MXC_CCM_MPCTL); in _mx31_clocks_init()
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