Searched refs:n_chans (Results 1 – 15 of 15) sorted by relevance
56 u32 n_chans; member97 for (chan = 0; chan < ipcc->n_chans; chan++) { in stm32_ipcc_rx_irq()127 for (chan = 0; chan < ipcc->n_chans ; chan++) { in stm32_ipcc_tx_irq()289 ipcc->n_chans = readl_relaxed(ipcc->reg_base + IPCC_HWCFGR); in stm32_ipcc_probe()290 ipcc->n_chans &= IPCFGR_CHAN_MASK; in stm32_ipcc_probe()295 ipcc->controller.num_chans = ipcc->n_chans; in stm32_ipcc_probe()
379 int n_chans; in probe_number_of_ai_chans() local383 for (n_chans = 0; n_chans < 16; n_chans++) { in probe_number_of_ai_chans()386 dt2801_writedata(dev, n_chans); in probe_number_of_ai_chans()396 return n_chans; in probe_number_of_ai_chans()
2555 unsigned int n_chans, int timed) in ni_m_series_ao_config_chanlist() argument2572 for (i = 0; i < n_chans; i++) { in ni_m_series_ao_config_chanlist()2628 unsigned int n_chans) in ni_old_ao_config_chanlist() argument2637 for (i = 0; i < n_chans; i++) { in ni_old_ao_config_chanlist()4346 int n_chans; member4378 if (addr < caldacs[type].n_chans) { in ni_write_caldac()4383 addr -= caldacs[type].n_chans; in ni_write_caldac()4436 int n_chans = 0; in caldac_setup() local4452 n_chans += caldacs[type].n_chans; in caldac_setup()4455 s->n_chan = n_chans; in caldac_setup()[all …]
42 for (ch = 0; ch < fsl_edma->n_chans; ch++) { in fsl_edma_tx_handler()85 for (ch = 0; ch < fsl_edma->n_chans; ch++) { in fsl_edma_err_handler()111 unsigned long chans_per_mux = fsl_edma->n_chans / dmamux_nr; in fsl_edma_xlate()298 fsl_edma->n_chans = chans; in fsl_edma_probe()353 for (i = 0; i < fsl_edma->n_chans; i++) { in fsl_edma_probe()448 for (i = 0; i < fsl_edma->n_chans; i++) { in fsl_edma_suspend_late()472 for (i = 0; i < fsl_edma->n_chans; i++) { in fsl_edma_resume_early()
31 for (ch = 0; ch < mcf_edma->n_chans; ch++) { in mcf_edma_tx_handler()200 mcf_edma->n_chans = chans; in mcf_edma_probe()206 if (!mcf_edma->n_chans) { in mcf_edma_probe()208 mcf_edma->n_chans = 64; in mcf_edma_probe()223 for (i = 0; i < mcf_edma->n_chans; i++) { in mcf_edma_probe()
164 u32 n_chans; member
213 u32 n_chans; member1174 fsl_qdma->n_chans = chans; in fsl_qdma_probe()1215 for (i = 0; i < fsl_qdma->n_chans; i++) { in fsl_qdma_probe()
115 chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr; in fsl_edma_chan_mux()
143 u32 n_chans; member780 u32 n_chans = cdd->n_chans; in cppi41_add_chans() local786 n_chans *= 2; in cppi41_add_chans()788 chans = devm_kcalloc(dev, n_chans, sizeof(*chans), GFP_KERNEL); in cppi41_add_chans()792 for (i = 0; i < n_chans; i++) { in cppi41_add_chans()810 cdd->first_td_desc = n_chans; in cppi41_add_chans()894 for (ch = 0; ch < cdd->n_chans; ch += 2) { in init_sched()904 reg = cdd->n_chans * 2 - 1; in init_sched()1109 "#dma-channels", &cdd->n_chans); in cppi41_dma_probe()
394 u32 n_chans = priv->dpaa2_qdma->n_chans; in dpaa2_qdma_fqdan_cb() local426 for (i = 0; i < n_chans; i++) { in dpaa2_qdma_fqdan_cb()608 num = dpaa2_qdma->n_chans; in dpaa2_dpdmai_free_channels()640 for (i = 0; i < dpaa2_qdma->n_chans; i++) { in dpaa2_dpdmai_init_channels()718 dpaa2_qdma->n_chans = NUM_CH; in dpaa2_qdma_probe()
101 u32 n_chans; member
346 int i, ielen, n_chans; in ieee80211_prep_hw_scan() local361 n_chans = req->n_channels; in ieee80211_prep_hw_scan()367 n_chans = 0; in ieee80211_prep_hw_scan()373 local->hw_scan_req->req.channels[n_chans] = in ieee80211_prep_hw_scan()375 n_chans++; in ieee80211_prep_hw_scan()380 } while (!n_chans); in ieee80211_prep_hw_scan()383 local->hw_scan_req->req.n_channels = n_chans; in ieee80211_prep_hw_scan()
120 u32 n_chans; member
388 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_irq_init()444 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_setup_chans()501 pdma->n_chans = chans; in sf_pdma_probe()
2180 int n_chans = 0, i; in iwl_mvm_query_num_match_chans() local2188 n_chans += hweight8(matches[idx].matching_channels[i]); in iwl_mvm_query_num_match_chans()2194 n_chans += hweight8(matches[idx].matching_channels[i]); in iwl_mvm_query_num_match_chans()2197 return n_chans; in iwl_mvm_query_num_match_chans()
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