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Searched refs:num_dsc (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dresource.h50 int num_dsc; member
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c102 .num_dsc = 3,
813 .num_dsc = 3,
826 .num_dsc = 0,
838 .num_dsc = 2,
930 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
2230 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn302/
A Ddcn302_resource.c84 .num_dsc = 5,
267 .num_dsc = 5,
1151 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_destruct()
1701 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn303/
A Ddcn303_resource.c67 .num_dsc = 2,
245 .num_dsc = 2,
1077 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_destruct()
1632 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_structs.h140 unsigned int num_dsc; member
A Ddisplay_mode_vba.c364 mode_lib->vba.NumberOfDSC = ip->num_dsc; in fetch_ip_params()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c104 .num_dsc = 6,
170 .num_dsc = 5,
1023 .num_dsc = 6,
1063 .num_dsc = 5,
1474 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_destruct()
1701 if (pool->res_cap->num_dsc == pool->res_cap->num_opp) { in dcn20_acquire_dsc()
1715 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_acquire_dsc()
1729 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_release_dsc()
4023 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_resource.c646 .num_dsc = 3,
1082 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_destruct()
1646 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c45 .num_dsc = 3,
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c127 .num_dsc = 3,
966 .num_dsc = 3,
1550 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_destruct()
2420 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_construct()
A Ddcn31_hwseq.c196 for (i = 0; i < res_pool->res_cap->num_dsc; i++) in dcn31_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c104 .num_dsc = 6,
806 .num_dsc = 6,
1228 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn30_resource_destruct()
2822 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn30_resource_construct()
A Ddcn30_hwseq.c532 for (i = 0; i < res_pool->res_cap->num_dsc; i++) in dcn30_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer.c403 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn10_log_hw_state()
1461 for (i = 0; i < res_pool->res_cap->num_dsc; i++) in dcn10_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_resource.c2236 return dc->res_pool->res_cap->num_dsc > 0; in dc_resource_is_dsc_encoding_supported()

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