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Searched refs:num_levels (Results 1 – 25 of 57) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_pp_smu.c125 clks->num_levels = 6; in get_default_clock_levels()
130 clks->num_levels = 6; in get_default_clock_levels()
135 clks->num_levels = 2; in get_default_clock_levels()
140 clks->num_levels = 0; in get_default_clock_levels()
229 dc_clks->num_levels = pp_clks->count; in pp_to_dc_clock_levels()
250 pp_clks->num_levels, in pp_to_dc_clock_levels_with_latency()
255 clk_level_info->num_levels = pp_clks->num_levels; in pp_to_dc_clock_levels_with_latency()
277 pp_clks->num_levels, in pp_to_dc_clock_levels_with_voltage()
282 clk_level_info->num_levels = pp_clks->num_levels; in pp_to_dc_clock_levels_with_voltage()
348 dc_clks->num_levels, i); in dm_pp_get_clock_levels_by_type()
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/linux/drivers/firmware/arm_scmi/
A Dvoltage.c88 u32 num_levels; in scmi_init_voltage_levels() local
90 num_levels = num_returned + num_remaining; in scmi_init_voltage_levels()
95 if (!num_levels || in scmi_init_voltage_levels()
99 num_levels, num_returned, num_remaining, v->id); in scmi_init_voltage_levels()
103 v->levels_uv = devm_kcalloc(dev, num_levels, sizeof(u32), GFP_KERNEL); in scmi_init_voltage_levels()
107 v->num_levels = num_levels; in scmi_init_voltage_levels()
169 if (!v->num_levels) { in scmi_voltage_descriptors_get()
178 if (desc_index + num_returned > v->num_levels) { in scmi_voltage_descriptors_get()
181 v->num_levels); in scmi_voltage_descriptors_get()
203 v->num_levels = 0; in scmi_voltage_descriptors_get()
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/linux/drivers/video/backlight/
A Dled_bl.c127 int num_levels; in led_bl_parse_levels() local
134 num_levels = of_property_count_u32_elems(node, "brightness-levels"); in led_bl_parse_levels()
135 if (num_levels > 1) { in led_bl_parse_levels()
140 levels = devm_kzalloc(dev, sizeof(u32) * num_levels, in led_bl_parse_levels()
147 num_levels); in led_bl_parse_levels()
156 for (i = 0 ; i < num_levels; i++) { in led_bl_parse_levels()
161 priv->max_brightness = num_levels - 1; in led_bl_parse_levels()
163 } else if (num_levels >= 0) in led_bl_parse_levels()
A Dpwm_bl.c233 unsigned int num_levels; in pwm_backlight_parse_dt() local
262 num_levels = length / sizeof(u32); in pwm_backlight_parse_dt()
265 if (num_levels > 0) { in pwm_backlight_parse_dt()
266 size_t size = sizeof(*data->levels) * num_levels; in pwm_backlight_parse_dt()
274 num_levels); in pwm_backlight_parse_dt()
299 unsigned int num_input_levels = num_levels; in pwm_backlight_parse_dt()
315 num_levels = (num_input_levels - 1) * num_steps + 1; in pwm_backlight_parse_dt()
317 num_levels); in pwm_backlight_parse_dt()
323 size = sizeof(*table) * num_levels; in pwm_backlight_parse_dt()
356 data->max_brightness = num_levels - 1; in pwm_backlight_parse_dt()
/linux/drivers/gpu/drm/amd/display/dc/dce112/
A Ddce112_resource.c1085 clks.clocks_in_khz[clks.num_levels-1], 1000); in bw_calcs_data_update_from_pplib()
1087 clks.clocks_in_khz[clks.num_levels/8], 1000); in bw_calcs_data_update_from_pplib()
1089 clks.clocks_in_khz[clks.num_levels*2/8], 1000); in bw_calcs_data_update_from_pplib()
1091 clks.clocks_in_khz[clks.num_levels*3/8], 1000); in bw_calcs_data_update_from_pplib()
1093 clks.clocks_in_khz[clks.num_levels*4/8], 1000); in bw_calcs_data_update_from_pplib()
1095 clks.clocks_in_khz[clks.num_levels*5/8], 1000); in bw_calcs_data_update_from_pplib()
1097 clks.clocks_in_khz[clks.num_levels*6/8], 1000); in bw_calcs_data_update_from_pplib()
1175 eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz; in bw_calcs_data_update_from_pplib()
1189 mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz; in bw_calcs_data_update_from_pplib()
1195 eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz; in bw_calcs_data_update_from_pplib()
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/linux/drivers/gpu/drm/amd/display/dc/dce120/
A Ddce120_resource.c928 &eng_clks) || eng_clks.num_levels == 0) { in bw_calcs_data_update_from_pplib()
930 eng_clks.num_levels = 8; in bw_calcs_data_update_from_pplib()
933 for (i = 0; i < eng_clks.num_levels; i++) { in bw_calcs_data_update_from_pplib()
961 &mem_clks) || mem_clks.num_levels == 0) { in bw_calcs_data_update_from_pplib()
963 mem_clks.num_levels = 3; in bw_calcs_data_update_from_pplib()
967 for (i = 0; i < eng_clks.num_levels; i++) { in bw_calcs_data_update_from_pplib()
1007 mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz - 1; in bw_calcs_data_update_from_pplib()
1011 eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz; in bw_calcs_data_update_from_pplib()
1025 mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz; in bw_calcs_data_update_from_pplib()
1031 eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz; in bw_calcs_data_update_from_pplib()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c94 *num_levels = 2; in dcn3_init_single_clock()
98 *num_levels = ret & 0xFF; in dcn3_init_single_clock()
163 unsigned int num_levels; in dcn3_init_clocks() local
186 &num_levels); in dcn3_init_clocks()
191 &num_levels); in dcn3_init_clocks()
196 &num_levels); in dcn3_init_clocks()
202 &num_levels); in dcn3_init_clocks()
207 &num_levels); in dcn3_init_clocks()
212 &num_levels); in dcn3_init_clocks()
436 &num_levels); in dcn3_get_memclk_states_from_smu()
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/linux/drivers/gpu/drm/radeon/
A Dsumo_dpm.c354 for (i = 0; i < ps->num_levels - 1; i++) in sumo_program_bsp()
408 for (i = 0; i < ps->num_levels; i++) { in sumo_program_at()
1111 for (i = 0; i < ps->num_levels; i++) { in sumo_apply_state_adjust_rules()
1144 else if (i == ps->num_levels - 1) in sumo_apply_state_adjust_rules()
1397 ps->num_levels = 1; in sumo_patch_boot_state()
1444 ps->num_levels = index + 1; in sumo_parse_pplib_clock_info()
1736 pi->current_ps.num_levels = 1; in sumo_construct_boot_and_acpi_state()
1803 for (i = 0; i < ps->num_levels; i++) { in sumo_dpm_print_power_state()
1927 if (ps->num_levels <= 1) in sumo_dpm_force_performance_level()
1948 for (i = 1; i < ps->num_levels; i++) { in sumo_dpm_force_performance_level()
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A Dtrinity_dpm.c1165 if (ps->num_levels <= 1) in trinity_dpm_force_performance_level()
1176 for (i = 0; i < ps->num_levels; i++) { in trinity_dpm_force_performance_level()
1284 ps->num_levels = 1; in trinity_patch_boot_state()
1309 pi->current_ps.num_levels = 1; in trinity_construct_boot_state()
1390 if (ps == NULL || ps->num_levels <= 1) in trinity_calculate_display_wm()
1392 else if (ps->num_levels == 2) { in trinity_calculate_display_wm()
1518 for (i = 0; i < ps->num_levels; i++) { in trinity_apply_state_adjust_rules()
1677 ps->num_levels = index + 1; in trinity_parse_pplib_clock_info()
1976 for (i = 0; i < ps->num_levels; i++) { in trinity_dpm_print_power_state()
1996 if (current_index >= ps->num_levels) { in trinity_dpm_debugfs_print_current_performance_level()
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A Dr100_track.h44 unsigned num_levels; member
/linux/drivers/gpu/drm/amd/display/dc/
A Ddm_services_types.h98 uint32_t num_levels; member
108 uint32_t num_levels; member
118 uint32_t num_levels; member
/linux/arch/nds32/kernel/
A Dcacheinfo.c32 this_cpu_ci->num_levels = 1; in init_cache_level()
43 for (idx = 0, level = 1; level <= this_cpu_ci->num_levels && in populate_cache_leaves()
/linux/arch/arm64/kernel/
A Dcacheinfo.c76 this_cpu_ci->num_levels = level; in init_cache_level()
88 for (idx = 0, level = 1; level <= this_cpu_ci->num_levels && in populate_cache_leaves()
/linux/drivers/gpu/drm/amd/include/
A Ddm_pp_interface.h175 uint32_t num_levels; member
185 uint32_t num_levels; member
/linux/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_resource.c1292 clks.clocks_in_khz[clks.num_levels-1], 1000); in bw_calcs_data_update_from_pplib()
1294 clks.clocks_in_khz[clks.num_levels/8], 1000); in bw_calcs_data_update_from_pplib()
1296 clks.clocks_in_khz[clks.num_levels*2/8], 1000); in bw_calcs_data_update_from_pplib()
1298 clks.clocks_in_khz[clks.num_levels*3/8], 1000); in bw_calcs_data_update_from_pplib()
1300 clks.clocks_in_khz[clks.num_levels*4/8], 1000); in bw_calcs_data_update_from_pplib()
1302 clks.clocks_in_khz[clks.num_levels*5/8], 1000); in bw_calcs_data_update_from_pplib()
1304 clks.clocks_in_khz[clks.num_levels*6/8], 1000); in bw_calcs_data_update_from_pplib()
1315 clks.clocks_in_khz[clks.num_levels-1], 1000); in bw_calcs_data_update_from_pplib()
1317 clks.clocks_in_khz[clks.num_levels>>1], 1000); in bw_calcs_data_update_from_pplib()
1330 clks.clocks_in_khz[clks.num_levels>>1] * MEMORY_TYPE_MULTIPLIER_CZ, in bw_calcs_data_update_from_pplib()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Daldebaran_ppt.c545 clocks->num_levels = count; in aldebaran_get_clk_table()
764 display_levels = clocks.num_levels; in aldebaran_print_clk_levels()
774 display_levels = clocks.num_levels + 1; in aldebaran_print_clk_levels()
787 (clocks.num_levels == 1) ? in aldebaran_print_clk_levels()
818 for (i = 0; i < clocks.num_levels; i++) in aldebaran_print_clk_levels()
821 (clocks.num_levels == 1) ? "*" : in aldebaran_print_clk_levels()
841 for (i = 0; i < clocks.num_levels; i++) in aldebaran_print_clk_levels()
844 (clocks.num_levels == 1) ? "*" : in aldebaran_print_clk_levels()
867 (clocks.num_levels == 1) ? "*" : in aldebaran_print_clk_levels()
890 (clocks.num_levels == 1) ? "*" : in aldebaran_print_clk_levels()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
A Ddce110_clk_mgr.c76 if (dc->sclk_lvls.num_levels == 0) in determine_sclk_from_bounding_box()
79 for (i = 0; i < dc->sclk_lvls.num_levels; i++) { in determine_sclk_from_bounding_box()
89 return dc->sclk_lvls.clocks_in_khz[dc->sclk_lvls.num_levels - 1]; in determine_sclk_from_bounding_box()
/linux/fs/verity/
A Dopen.c95 if (params->num_levels >= FS_VERITY_MAX_LEVELS) { in fsverity_init_merkle_tree_params()
103 params->level_start[params->num_levels++] = blocks; in fsverity_init_merkle_tree_params()
109 for (level = (int)params->num_levels - 1; level >= 0; level--) { in fsverity_init_merkle_tree_params()
A Denable.c61 if (level < params->num_levels) { in build_merkle_tree_level()
114 if (level == params->num_levels) /* Root hash? */ in build_merkle_tree_level()
182 for (level = 0; level <= params->num_levels; level++) { in build_merkle_tree()
/linux/arch/s390/kernel/
A Dcache.c147 this_cpu_ci->num_levels = level; in init_cache_level()
163 for (idx = 0, level = 0; level < this_cpu_ci->num_levels && in populate_cache_leaves()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.c1193 clocks->num_levels = 0; in smu10_get_clock_by_type_with_latency()
1196 clocks->data[clocks->num_levels].clocks_in_khz = in smu10_get_clock_by_type_with_latency()
1198 clocks->data[clocks->num_levels].latency_in_us = latency_required ? in smu10_get_clock_by_type_with_latency()
1202 clocks->num_levels++; in smu10_get_clock_by_type_with_latency()
1247 clocks->num_levels = 0; in smu10_get_clock_by_type_with_voltage()
1250 clocks->data[clocks->num_levels].clocks_in_khz = pclk_vol_table->entries[i].clk * 10; in smu10_get_clock_by_type_with_voltage()
1251 clocks->data[clocks->num_levels].voltage_in_mv = pclk_vol_table->entries[i].vol; in smu10_get_clock_by_type_with_voltage()
1252 clocks->num_levels++; in smu10_get_clock_by_type_with_voltage()
/linux/drivers/gpu/drm/amd/display/dc/calcs/
A Ddcn_calcs.c1475 if (clks->num_levels == 0) in verify_clock_values()
1478 for (i = 0; i < clks->num_levels; i++) in verify_clock_values()
1503 ASSERT(fclks.num_levels); in dcn_bw_update_from_pplib()
1506 vmid0p72_idx = fclks.num_levels - in dcn_bw_update_from_pplib()
1507 (fclks.num_levels > 2 ? 3 : (fclks.num_levels > 1 ? 2 : 1)); in dcn_bw_update_from_pplib()
1508 vnom0p8_idx = fclks.num_levels - (fclks.num_levels > 1 ? 2 : 1); in dcn_bw_update_from_pplib()
1509 vmax0p9_idx = fclks.num_levels - 1; in dcn_bw_update_from_pplib()
1538 if (res && dcfclks.num_levels >= 3) { in dcn_bw_update_from_pplib()
1540 dc->dcn_soc->dcfclkv_mid0p72 = dcfclks.data[dcfclks.num_levels - 3].clocks_in_khz / 1000.0; in dcn_bw_update_from_pplib()
1541 dc->dcn_soc->dcfclkv_nom0p8 = dcfclks.data[dcfclks.num_levels - 2].clocks_in_khz / 1000.0; in dcn_bw_update_from_pplib()
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/linux/drivers/gpu/drm/i915/display/
A Dintel_display_debugfs.c1597 int num_levels; in wm_latency_show() local
1600 num_levels = 3; in wm_latency_show()
1602 num_levels = 1; in wm_latency_show()
1604 num_levels = 3; in wm_latency_show()
1606 num_levels = ilk_wm_max_level(dev_priv) + 1; in wm_latency_show()
1714 int num_levels; in wm_latency_write() local
1720 num_levels = 3; in wm_latency_write()
1722 num_levels = 1; in wm_latency_write()
1724 num_levels = 3; in wm_latency_write()
1739 if (ret != num_levels) in wm_latency_write()
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/linux/drivers/net/ethernet/mellanox/mlx5/core/
A Dfs_core.c52 .num_levels = num_levels_val,\
150 int num_levels; member
1124 if (ft_attr->level >= fs_prio->num_levels) { in __mlx5_create_flow_table()
2313 int num_levels, in _fs_create_prio() argument
2325 fs_prio->num_levels = num_levels; in _fs_create_prio()
2334 int num_levels) in fs_create_prio_chained() argument
2340 unsigned int prio, int num_levels) in fs_create_prio() argument
2521 acc_level += prio->num_levels; in set_prio_attrs_in_ns()
2543 if (!prio->num_levels) in set_prio_attrs_in_prio()
2544 prio->num_levels = acc_level_ns - prio->start_level; in set_prio_attrs_in_prio()
[all …]
/linux/include/linux/
A Dcacheinfo.h76 unsigned int num_levels; member

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