Searched refs:num_queue_per_pipe (Results 1 – 12 of 12) sorted by relevance
46 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()47 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()59 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()77 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()78 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()87 *queue = bit % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_bit_to_me_queue()90 *me = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()215 adev->gfx.mec.num_queue_per_pipe, in amdgpu_gfx_compute_queue_acquire()223 adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()243 me = (i / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_graphics_queue_acquire()[all …]
85 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()750 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()751 queue_slot = queue_idx % adev->gfx.mec.num_queue_per_pipe; in get_wave_count()835 adev->gfx.mec.num_queue_per_pipe; in kgd_gfx_v9_get_cu_occupancy()
66 u32 num_queue_per_pipe; member262 uint32_t num_queue_per_pipe; member
125 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()146 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
78 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
77 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
4806 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4809 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4819 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4822 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v10_0_sw_init()4827 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4830 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4882 for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()4899 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()
4473 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v7_0_sw_init()4528 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v7_0_sw_init()
1966 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v8_0_sw_init()2045 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v8_0_sw_init()
2336 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_0_sw_init()2409 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v9_0_sw_init()
124 uint32_t num_queue_per_pipe; member
76 + pipe) * dqm->dev->shared_resources.num_queue_per_pipe; in is_pipe_enabled()79 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i) in is_pipe_enabled()94 return dqm->dev->shared_resources.num_queue_per_pipe; in get_queues_per_pipe()1114 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe) in set_sched_resources()
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