/linux/drivers/gpu/drm/nouveau/dispnv04/ |
A D | crtc.c | 171 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset); in nv_crtc_calc_state_ext() 547 if (!nv_crtc->index) in nv_crtc_mode_set_regs() 752 if (!nv_crtc) in nv_crtc_destroy() 765 kfree(nv_crtc); in nv_crtc_destroy() 1000 nv_crtc->cursor.hide(nv_crtc, true); in nv04_crtc_cursor_set() 1022 nv_crtc->cursor.offset = nv_crtc->cursor.nvbo->offset; in nv04_crtc_cursor_set() 1023 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset); in nv04_crtc_cursor_set() 1024 nv_crtc->cursor.show(nv_crtc, true); in nv04_crtc_cursor_set() 1035 nv_crtc->cursor.set_pos(nv_crtc, x, y); in nv04_crtc_cursor_move() 1320 nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL); in nv04_crtc_create() [all …]
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A D | disp.c | 90 if (nv_crtc->cursor.nvbo) { in nv04_display_fini() 91 if (nv_crtc->cursor.set_offset) in nv04_display_fini() 117 nv_crtc->save(&nv_crtc->base); in nv04_display_init() 144 if (!nv_crtc->cursor.nvbo) in nv04_display_init() 159 nv_crtc->lut.depth = 0; in nv04_display_init() 175 if (!nv_crtc->cursor.nvbo) in nv04_display_init() 179 nv_crtc->cursor.set_offset(nv_crtc, in nv04_display_init() 181 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, in nv04_display_init() 182 nv_crtc->cursor_saved_y); in nv04_display_init() 194 struct nouveau_crtc *nv_crtc; in nv04_display_destroy() local [all …]
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A D | cursor.c | 9 nv04_cursor_show(struct nouveau_crtc *nv_crtc, bool update) in nv04_cursor_show() argument 11 nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, true); in nv04_cursor_show() 15 nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update) in nv04_cursor_hide() argument 17 nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, false); in nv04_cursor_hide() 21 nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) in nv04_cursor_set_pos() argument 23 nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y; in nv04_cursor_set_pos() 24 NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index, in nv04_cursor_set_pos() 38 nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) in nv04_cursor_set_offset() argument 40 struct drm_device *dev = nv_crtc->base.dev; in nv04_cursor_set_offset() 43 struct drm_crtc *crtc = &nv_crtc->base; in nv04_cursor_set_offset() [all …]
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A D | dfp.c | 117 struct nouveau_crtc *nv_crtc; in nv04_dfp_update_fp_control() local 121 nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_update_fp_control() 129 *fpc = nv_crtc->dpms_saved_fp_control; in nv04_dfp_update_fp_control() 136 nv_crtc = nouveau_crtc(crtc); in nv04_dfp_update_fp_control() 140 if (!is_fpc_off(*fpc) && !nv_crtc->fp_users) { in nv04_dfp_update_fp_control() 141 nv_crtc->dpms_saved_fp_control = *fpc; in nv04_dfp_update_fp_control() 145 NVWriteRAMDAC(dev, nv_crtc->index, in nv04_dfp_update_fp_control() 287 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_mode_set() local 297 NV_DEBUG(drm, "Output mode on CRTC %d:\n", nv_crtc->index); in nv04_dfp_mode_set() 451 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_commit() local [all …]
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A D | tvnv04.c | 145 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_tv_mode_set() local 146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set() 169 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_tv_commit() local 176 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); in nv04_tv_commit()
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A D | overlay.c | 124 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); in nv10_update_plane() local 128 int soff = NV_PCRTC0_SIZE * nv_crtc->index; in nv10_update_plane() 129 int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index; in nv10_update_plane()
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A D | dac.c | 416 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dac_commit() local 423 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); in nv04_dac_commit()
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A D | tvnv17.c | 576 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv17_tv_commit() local 603 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); in nv17_tv_commit()
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/linux/drivers/gpu/drm/nouveau/dispnv50/ |
A D | disp.c | 508 switch (nv_crtc->index) { in nv50_dac_atomic_enable() 525 nv_encoder->crtc = &nv_crtc->base; in nv50_dac_atomic_enable() 625 struct nouveau_crtc *nv_crtc; in nv50_audio_component_get_eld() local 642 if (!nv_crtc || nv_encoder->or != port || nv_crtc->index != dev_id) in nv50_audio_component_get_eld() 740 (0x0100 << nv_crtc->index), in nv50_audio_disable() 752 nv_crtc->index); in nv50_audio_disable() 774 (0x0100 << nv_crtc->index), in nv50_audio_enable() 792 nv_crtc->index); in nv50_audio_enable() 1728 nv_encoder->crtc = &nv_crtc->base; in nv50_sor_atomic_enable() 1960 switch (nv_crtc->index) { in nv50_pior_atomic_enable() [all …]
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A D | head.c | 541 struct nouveau_crtc *nv_crtc = in nv50_head_vblank_handler() local 544 if (drm_crtc_handle_vblank(&nv_crtc->base)) in nv50_head_vblank_handler() 545 nv50_crc_handle_vblank(nv50_head(&nv_crtc->base)); in nv50_head_vblank_handler() 557 struct nouveau_crtc *nv_crtc; in nv50_head_create() local 590 nv_crtc = &head->base; in nv50_head_create() 591 crtc = &nv_crtc->base; in nv50_head_create() 612 .head = nv_crtc->index, in nv50_head_create() 616 &nv_crtc->vblank); in nv50_head_create()
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/linux/drivers/gpu/drm/nouveau/ |
A D | nouveau_connector.h | 175 nouveau_crtc_connector_get(struct nouveau_crtc *nv_crtc) in nouveau_crtc_connector_get() argument 177 struct drm_device *dev = nv_crtc->base.dev; in nouveau_crtc_connector_get() 181 struct drm_crtc *crtc = to_drm_crtc(nv_crtc); in nouveau_crtc_connector_get()
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A D | nouveau_display.c | 52 struct nouveau_crtc *nv_crtc; in nouveau_display_vblank_enable() local 54 nv_crtc = nouveau_crtc(crtc); in nouveau_display_vblank_enable() 55 nvif_notify_get(&nv_crtc->vblank); in nouveau_display_vblank_enable() 63 struct nouveau_crtc *nv_crtc; in nouveau_display_vblank_disable() local 65 nv_crtc = nouveau_crtc(crtc); in nouveau_display_vblank_disable() 66 nvif_notify_put(&nv_crtc->vblank); in nouveau_display_vblank_disable()
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