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Searched refs:nv_funcs (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_pp_smu.c846 funcs->nv_funcs.pp_smu.dm = ctx; in dm_pp_get_funcs()
847 funcs->nv_funcs.set_display_count = pp_nv_set_display_count; in dm_pp_get_funcs()
848 funcs->nv_funcs.set_hard_min_dcfclk_by_freq = in dm_pp_get_funcs()
850 funcs->nv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()
852 funcs->nv_funcs.set_voltage_by_freq = in dm_pp_get_funcs()
854 funcs->nv_funcs.set_wm_ranges = pp_nv_set_wm_ranges; in dm_pp_get_funcs()
857 funcs->nv_funcs.set_pme_wa_enable = NULL; in dm_pp_get_funcs()
859 funcs->nv_funcs.set_hard_min_uclk_by_freq = pp_nv_set_hard_min_uclk_by_freq; in dm_pp_get_funcs()
861 funcs->nv_funcs.get_maximum_sustainable_clocks = pp_nv_get_maximum_sustainable_clocks; in dm_pp_get_funcs()
863 funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states; in dm_pp_get_funcs()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c243 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in dcn2_update_clocks()
418 pp_smu = &clk_mgr->pp_smu->nv_funcs; in dcn2_enable_pme_wa()
501 if (!clk_mgr->pp_smu || !clk_mgr->pp_smu->nv_funcs.set_voltage_by_freq) in dcn2_notify_link_rate_change()
504 pp_smu = &clk_mgr->pp_smu->nv_funcs; in dcn2_notify_link_rate_change()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddm_pp_smu.h312 struct pp_smu_funcs_nv nv_funcs; member
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c3681 if (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) { in init_soc_bounding_box()
3682 status = (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) in init_soc_bounding_box()
3683 (&pool->base.pp_smu->nv_funcs.pp_smu, uclk_states, &num_states); in init_soc_bounding_box()
3688 if (pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks) { in init_soc_bounding_box()
3689 status = (*pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks) in init_soc_bounding_box()
3690 (&pool->base.pp_smu->nv_funcs.pp_smu, &max_clocks); in init_soc_bounding_box()
3934 if (pool->base.pp_smu->nv_funcs.set_wm_ranges) in dcn20_resource_construct()
3935 pool->base.pp_smu->nv_funcs.set_wm_ranges(&pool->base.pp_smu->nv_funcs.pp_smu, &ranges); in dcn20_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_resource.c1391 pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges); in set_wm_ranges()
1548 if (!dc->debug.disable_pplib_wm_range && pool->base.pp_smu->nv_funcs.set_wm_ranges) in dcn301_resource_construct()

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