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Searched refs:nvkm_gpuobj_new (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
A Dnv50.c115 ret = nvkm_gpuobj_new(device, 0x20000, 0, false, NULL, &bar->mem); in nv50_bar_oneinit()
119 ret = nvkm_gpuobj_new(device, bar->pgd_addr, 0, false, bar->mem, in nv50_bar_oneinit()
124 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, bar->mem, &bar->pgd); in nv50_bar_oneinit()
151 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar2); in nv50_bar_oneinit()
187 ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar1); in nv50_bar_oneinit()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
A Dchang84.c242 ret = nvkm_gpuobj_new(device, 0x0200, 0, true, chan->base.inst, in g84_fifo_chan_ctor()
247 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst, in g84_fifo_chan_ctor()
252 ret = nvkm_gpuobj_new(device, 0x1000, 0x400, true, chan->base.inst, in g84_fifo_chan_ctor()
257 ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->base.inst, in g84_fifo_chan_ctor()
A Dchannv50.c260 ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, chan->base.inst, in nv50_fifo_chan_ctor()
265 ret = nvkm_gpuobj_new(device, 0x1200, 0, true, chan->base.inst, in nv50_fifo_chan_ctor()
270 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst, in nv50_fifo_chan_ctor()
A Dchan.c380 ret = nvkm_gpuobj_new(device, size, align, zero, NULL, &chan->inst); in nvkm_fifo_chan_ctor()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/cipher/
A Dg84.c37 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, in g84_cipher_oclass_bind()
59 return nvkm_gpuobj_new(object->engine->subdev.device, 256, in g84_cipher_cclass_bind()
/linux/drivers/gpu/drm/nouveau/include/nvkm/core/
A Dgpuobj.h35 int nvkm_gpuobj_new(struct nvkm_device *, u32 size, int align, bool zero,
/linux/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
A Dnv50.c40 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4, in nv50_mpeg_cclass_bind()
A Dnv44.c56 int ret = nvkm_gpuobj_new(chan->object.engine->subdev.device, 264 * 4, in nv44_mpeg_chan_bind()
A Dnv31.c42 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, align, in nv31_mpeg_object_bind()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/dma/
A Dusergf119.c47 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj); in gf119_dmaobj_bind()
A Dusergv100.c47 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj); in gv100_dmaobj_bind()
A Dusergf100.c48 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj); in gf100_dmaobj_bind()
A Dusernv04.c62 ret = nvkm_gpuobj_new(device, 16, align, false, parent, pgpuobj); in nv04_dmaobj_bind()
A Dusernv50.c48 ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj); in nv50_dmaobj_bind()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dnv40.c47 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 20, align, in nv40_gr_object_bind()
79 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in nv40_gr_chan_bind()
A Dnv50.c46 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, in nv50_gr_object_bind()
73 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in nv50_gr_chan_bind()
A Dnv04.c1046 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, align, in nv04_gr_object_bind()
A Dgf100.c327 ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in gf100_gr_chan_bind()
/linux/drivers/gpu/drm/nouveau/nvkm/core/
A Dramht.c157 ret = nvkm_gpuobj_new(ramht->device, size, align, true, in nvkm_ramht_new()
A Dgpuobj.c229 nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero, in nvkm_gpuobj_new() function
/linux/drivers/gpu/drm/nouveau/nvkm/engine/
A Dxtensa.c47 return nvkm_gpuobj_new(object->engine->subdev.device, 0x10000, align, in nvkm_xtensa_cclass_bind()
A Dfalcon.c49 return nvkm_gpuobj_new(object->engine->subdev.device, 256, in nvkm_falcon_cclass_bind()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dnv50.c136 ret = nvkm_gpuobj_new(device, 0x10000, 0x10000, false, NULL, in nv50_disp_oneinit_()
/linux/drivers/gpu/drm/nouveau/
A Dnouveau_drm.c395 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, in nouveau_accel_gr_init()

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