/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
A D | hdmig84.c | 43 nvkm_mask(device, 0x6165a4 + hoff, 0x40000000, 0x00000000); in g84_hdmi_ctrl() 44 nvkm_mask(device, 0x61653c + hoff, 0x00000001, 0x00000000); in g84_hdmi_ctrl() 45 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000); in g84_hdmi_ctrl() 46 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000000); in g84_hdmi_ctrl() 51 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000); in g84_hdmi_ctrl() 58 nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000001); in g84_hdmi_ctrl() 62 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000000); in g84_hdmi_ctrl() 66 nvkm_mask(device, 0x616500 + hoff, 0x00000001, 0x00000001); in g84_hdmi_ctrl() 69 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010000); in g84_hdmi_ctrl() 77 nvkm_mask(device, 0x61653c + hoff, 0x00010001, 0x00010001); in g84_hdmi_ctrl() [all …]
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A D | hdmigt215.c | 43 nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000); in gt215_hdmi_ctrl() 44 nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl() 45 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl() 46 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl() 51 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl() 58 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001); in gt215_hdmi_ctrl() 62 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl() 66 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001); in gt215_hdmi_ctrl() 69 nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000); in gt215_hdmi_ctrl() 77 nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001); in gt215_hdmi_ctrl() [all …]
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A D | hdmigf119.c | 42 nvkm_mask(device, 0x616798 + hoff, 0x40000000, 0x00000000); in gf119_hdmi_ctrl() 43 nvkm_mask(device, 0x616730 + hoff, 0x00000001, 0x00000000); in gf119_hdmi_ctrl() 44 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000000); in gf119_hdmi_ctrl() 45 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000000); in gf119_hdmi_ctrl() 50 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000000); in gf119_hdmi_ctrl() 57 nvkm_mask(device, 0x616714 + hoff, 0x00000001, 0x00000001); in gf119_hdmi_ctrl() 61 nvkm_mask(device, 0x616730 + hoff, 0x00010001, 0x00010000); in gf119_hdmi_ctrl() 72 nvkm_mask(device, 0x616730 + hoff, 0x00000001, 0x00000001); in gf119_hdmi_ctrl() 76 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000000); in gf119_hdmi_ctrl() 78 nvkm_mask(device, 0x6167a4 + hoff, 0x00000001, 0x00000001); in gf119_hdmi_ctrl() [all …]
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A D | sorg94.c | 33 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark); in g94_sor_dp_watermark() 42 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2); in g94_sor_dp_activesym() 43 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 | in g94_sor_dp_activesym() 53 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym() 54 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym() 94 nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask); in g94_sor_dp_power() 95 nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000); in g94_sor_dp_power() 117 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); in g94_sor_dp_links() 118 nvkm_mask(device, 0x61c10c + loff, 0x001f4000, dpctrl); in g94_sor_dp_links() 165 nvkm_mask(device, 0x00e840, 0x80000000, 0x00000000); in g94_sor_war_update_sppll1() [all …]
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A D | hdmigk104.c | 43 nvkm_mask(device, 0x616798 + hoff, 0x40000000, 0x00000000); in gk104_hdmi_ctrl() 44 nvkm_mask(device, 0x690100 + hdmi, 0x00000001, 0x00000000); in gk104_hdmi_ctrl() 45 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000); in gk104_hdmi_ctrl() 46 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000); in gk104_hdmi_ctrl() 51 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000); in gk104_hdmi_ctrl() 58 nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000001); in gk104_hdmi_ctrl() 62 nvkm_mask(device, 0x690100 + hdmi, 0x00010001, 0x00000000); in gk104_hdmi_ctrl() 68 nvkm_mask(device, 0x690100 + hdmi, 0x00000001, 0x00000001); in gk104_hdmi_ctrl() 73 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000); in gk104_hdmi_ctrl() 75 nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000001); in gk104_hdmi_ctrl() [all …]
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A D | hdmigv100.c | 41 nvkm_mask(device, 0x6165c0 + hoff, 0x40000000, 0x00000000); in gv100_hdmi_ctrl() 42 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000000); in gv100_hdmi_ctrl() 43 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000); in gv100_hdmi_ctrl() 44 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000); in gv100_hdmi_ctrl() 49 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000); in gv100_hdmi_ctrl() 56 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000001); in gv100_hdmi_ctrl() 60 nvkm_mask(device, 0x6f0100 + hdmi, 0x00010001, 0x00000000); in gv100_hdmi_ctrl() 70 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000001); in gv100_hdmi_ctrl() 75 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000); in gv100_hdmi_ctrl() 77 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001); in gv100_hdmi_ctrl() [all …]
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A D | sorgf119.c | 33 nvkm_mask(device, 0x616610 + hoff, 0x0800003f, 0x08000000 | watermark); in gf119_sor_dp_watermark() 41 nvkm_mask(device, 0x616620 + hoff, 0x0000ffff, h); in gf119_sor_dp_audio_sym() 42 nvkm_mask(device, 0x616624 + hoff, 0x00ffffff, v); in gf119_sor_dp_audio_sym() 52 nvkm_mask(device, 0x616618 + hoff, mask, data); in gf119_sor_dp_audio() 66 nvkm_mask(device, 0x616588 + hoff, 0x00003f3f, (slot_nr << 8) | slot); in gf119_sor_dp_vcpi() 67 nvkm_mask(device, 0x61658c + hoff, 0xffffffff, (aligned << 16) | pbn); in gf119_sor_dp_vcpi() 95 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern); in gf119_sor_dp_pattern() 114 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in gf119_sor_dp_links() 115 nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl); in gf119_sor_dp_links() 128 nvkm_mask(device, 0x612300 + soff, 0x007c0000, speed << 18); in gf119_sor_clock() [all …]
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A D | changf119.c | 31 nvkm_mask(device, 0x610090, 0x00000001 << index, 0x00000000 << index); in gf119_disp_chan_uevent_fini() 41 nvkm_mask(device, 0x610090, 0x00000001 << index, 0x00000001 << index); in gf119_disp_chan_uevent_init() 57 nvkm_mask(device, 0x610090, mask, 0x00000000); in gf119_disp_chan_intr() 58 nvkm_mask(device, 0x6100a0, mask, 0x00000000); in gf119_disp_chan_intr() 60 nvkm_mask(device, 0x6100a0, mask, mask); in gf119_disp_chan_intr()
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A D | sortu102.c | 33 nvkm_mask(device, 0x61657c + hoff, 0xffffffff, (aligned << 16) | pbn); in tu102_sor_dp_vcpi() 34 nvkm_mask(device, 0x616578 + hoff, 0x00003f3f, (slot_nr << 8) | slot); in tu102_sor_dp_vcpi() 53 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in tu102_sor_dp_links() 57 nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000); in tu102_sor_dp_links() 58 nvkm_mask(device, 0x61c10c + loff, 0x00000003, 0x00000001); in tu102_sor_dp_links() 60 nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl); in tu102_sor_dp_links()
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A D | tu102.c | 41 nvkm_mask(device, 0x6254e8, 0x00000001, 0x00000000); in tu102_disp_init() 56 nvkm_mask(device, 0x640000, 0x00000100 << i, 0x00000100 << i); in tu102_disp_init() 77 nvkm_mask(device, 0x640004, 1 << i, 1 << i); in tu102_disp_init() 80 nvkm_mask(device, 0x640780 + (i * 0x20) + j, 0xffffffff, tmp); in tu102_disp_init() 82 nvkm_mask(device, 0x64000c, 0x00000100, 0x00000100); in tu102_disp_init() 91 nvkm_mask(device, 0x610078, 0x00000001, 0x00000001); in tu102_disp_init()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
A D | gk110.c | 58 nvkm_mask(device, 0x000200, 0x00001000, 0x00000000); in gk110_pmu_pgob() 60 nvkm_mask(device, 0x000200, 0x08000000, 0x08000000); in gk110_pmu_pgob() 63 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000002); in gk110_pmu_pgob() 64 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001); in gk110_pmu_pgob() 65 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000); in gk110_pmu_pgob() 67 nvkm_mask(device, 0x0206b4, 0x00000000, 0x00000000); in gk110_pmu_pgob() 76 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000); in gk110_pmu_pgob() 77 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001); in gk110_pmu_pgob() 78 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000); in gk110_pmu_pgob() 80 nvkm_mask(device, 0x000200, 0x08000000, 0x00000000); in gk110_pmu_pgob() [all …]
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A D | gk104.c | 64 nvkm_mask(device, 0x000200, 0x00001000, 0x00000000); in gk104_pmu_pgob() 66 nvkm_mask(device, 0x000200, 0x08000000, 0x08000000); in gk104_pmu_pgob() 69 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000002); in gk104_pmu_pgob() 70 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001); in gk104_pmu_pgob() 71 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000); in gk104_pmu_pgob() 73 nvkm_mask(device, 0x020004, 0xc0000000, enable ? 0xc0000000 : 0x40000000); in gk104_pmu_pgob() 76 nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000); in gk104_pmu_pgob() 77 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001); in gk104_pmu_pgob() 78 nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000); in gk104_pmu_pgob() 80 nvkm_mask(device, 0x000200, 0x08000000, 0x00000000); in gk104_pmu_pgob() [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
A D | nv05.c | 78 nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0); in nv05_devinit_meminit() 89 nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]); in nv05_devinit_meminit() 92 nvkm_mask(device, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE); in nv05_devinit_meminit() 94 nvkm_mask(device, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20); in nv05_devinit_meminit() 95 nvkm_mask(device, NV04_PFB_CFG1, 0, 1); in nv05_devinit_meminit() 102 nvkm_mask(device, NV04_PFB_BOOT_0, in nv05_devinit_meminit() 111 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT, in nv05_devinit_meminit() 116 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT, in nv05_devinit_meminit() 120 nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT, in nv05_devinit_meminit()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
A D | gt215.c | 358 nvkm_mask(device, src, 0x00000100, 0x00000000); in disable_clk_src() 359 nvkm_mask(device, src, 0x00000001, 0x00000000); in disable_clk_src() 377 nvkm_mask(device, src1, 0x00000101, 0x00000101); in prog_pll() 378 nvkm_mask(device, ctrl, 0x00000008, 0x00000008); in prog_pll() 384 nvkm_mask(device, ctrl, 0x00000015, 0x00000015); in prog_pll() 385 nvkm_mask(device, ctrl, 0x00000010, 0x00000000); in prog_pll() 390 nvkm_mask(device, ctrl, 0x00000010, 0x00000010); in prog_pll() 394 nvkm_mask(device, ctrl, 0x00000010, 0x00000010); in prog_pll() 395 nvkm_mask(device, ctrl, 0x00000008, 0x00000000); in prog_pll() 399 nvkm_mask(device, ctrl, 0x00000018, 0x00000018); in prog_pll() [all …]
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A D | gm20b.c | 284 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gm20b_pllg_slide() 298 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gm20b_pllg_slide() 313 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gm20b_pllg_slide() 333 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_SYNC_MODE, in gm20b_pllg_enable() 518 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, in gm20b_dvfs_program_coeff() 526 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, in gm20b_dvfs_program_coeff() 555 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, in gm20b_dvfs_program_dfs_detection() 559 nvkm_mask(device, GPCPLL_DVFS0, in gm20b_dvfs_program_dfs_detection() 565 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, in gm20b_dvfs_program_dfs_detection() 828 nvkm_mask(device, BYPASSCTRL_SYS, in gm20b_clk_init() [all …]
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A D | gk20a.c | 225 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gk20a_pllg_slide() 236 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gk20a_pllg_slide() 247 nvkm_mask(device, GPCPLL_NDIV_SLOWDOWN, in gk20a_pllg_slide() 291 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, 0); in gk20a_pllg_disable() 306 nvkm_mask(device, GPC2CLK_OUT, GPC2CLK_OUT_VCODIV_MASK, in gk20a_pllg_program_mnp() 309 nvkm_mask(device, GPC2CLK_OUT, GPC2CLK_OUT_VCODIV_MASK, in gk20a_pllg_program_mnp() 324 nvkm_mask(device, GPC2CLK_OUT, GPC2CLK_OUT_VCODIV_MASK, in gk20a_pllg_program_mnp() 327 nvkm_mask(device, GPC2CLK_OUT, GPC2CLK_OUT_VCODIV_MASK, in gk20a_pllg_program_mnp() 561 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 1); in gk20a_clk_fini() 573 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 0); in gk20a_clk_init() [all …]
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A D | gk104.c | 362 nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x8000003f, info->ddiv); in gk104_clk_prog_0() 371 nvkm_mask(device, 0x137100, (1 << idx), 0x00000000); in gk104_clk_prog_1_0() 382 nvkm_mask(device, 0x137160 + (idx * 0x04), 0x00000100, 0x00000000); in gk104_clk_prog_1_1() 391 nvkm_mask(device, addr + 0x00, 0x00000004, 0x00000000); in gk104_clk_prog_2() 392 nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000000); in gk104_clk_prog_2() 395 nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); in gk104_clk_prog_2() 398 nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000000); in gk104_clk_prog_2() 403 nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000010); in gk104_clk_prog_2() 406 nvkm_mask(device, addr + 0x00, 0x00000004, 0x00000004); in gk104_clk_prog_2() 416 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f00, info->mdiv); in gk104_clk_prog_3() [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/privring/ |
A D | gk104.c | 92 nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002); in gk104_privring_intr() 103 nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000); in gk104_privring_init() 104 nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200); in gk104_privring_init() 105 nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); in gk104_privring_init() 106 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); in gk104_privring_init() 107 nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); in gk104_privring_init() 108 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200); in gk104_privring_init() 109 nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880); in gk104_privring_init()
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
A D | gk110.c | 342 nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000); in gk110_gr_init_419eb4() 343 nvkm_mask(device, 0x419eb4, 0x00002000, 0x00002000); in gk110_gr_init_419eb4() 344 nvkm_mask(device, 0x419eb4, 0x00004000, 0x00004000); in gk110_gr_init_419eb4() 345 nvkm_mask(device, 0x419eb4, 0x00008000, 0x00008000); in gk110_gr_init_419eb4() 346 nvkm_mask(device, 0x419eb4, 0x00001000, 0x00000000); in gk110_gr_init_419eb4() 347 nvkm_mask(device, 0x419eb4, 0x00002000, 0x00000000); in gk110_gr_init_419eb4() 348 nvkm_mask(device, 0x419eb4, 0x00004000, 0x00000000); in gk110_gr_init_419eb4() 349 nvkm_mask(device, 0x419eb4, 0x00008000, 0x00000000); in gk110_gr_init_419eb4()
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A D | ctxgv100.c | 153 nvkm_mask(device, 0x400088, 0x00060000, on ? 0x00060000 : 0x00000000); in gv100_grctx_generate_r400088() 169 nvkm_mask(device, 0x41980c, 0x00000010, 0x00000010); in gv100_grctx_generate_unkn() 170 nvkm_mask(device, 0x41be08, 0x00000004, 0x00000004); in gv100_grctx_generate_unkn() 171 nvkm_mask(device, 0x4064c0, 0x80000000, 0x80000000); in gv100_grctx_generate_unkn() 172 nvkm_mask(device, 0x405800, 0x08000000, 0x08000000); in gv100_grctx_generate_unkn() 173 nvkm_mask(device, 0x419c00, 0x00000008, 0x00000008); in gv100_grctx_generate_unkn() 181 nvkm_mask(device, 0x40988c, mask, data); in gv100_grctx_unkn88c() 183 nvkm_mask(device, 0x41a88c, mask, data); in gv100_grctx_unkn88c() 185 nvkm_mask(device, 0x408a14, mask, data); in gv100_grctx_unkn88c()
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A D | ctxgk104.c | 858 nvkm_mask(device, 0x418800, 0x00200000, 0x00200000); in gk104_grctx_generate_r418800() 859 nvkm_mask(device, 0x41be10, 0x00800000, 0x00800000); in gk104_grctx_generate_r418800() 907 nvkm_mask(device, 0x418c6c, 0x00000001, 0x00000001); in gk104_grctx_generate_unkn() 908 nvkm_mask(device, 0x41980c, 0x00000010, 0x00000010); in gk104_grctx_generate_unkn() 909 nvkm_mask(device, 0x41be08, 0x00000004, 0x00000004); in gk104_grctx_generate_unkn() 910 nvkm_mask(device, 0x4064c0, 0x80000000, 0x80000000); in gk104_grctx_generate_unkn() 911 nvkm_mask(device, 0x405800, 0x08000000, 0x08000000); in gk104_grctx_generate_unkn() 912 nvkm_mask(device, 0x419c00, 0x00000008, 0x00000008); in gk104_grctx_generate_unkn() 919 nvkm_mask(device, 0x419f78, 0x00000001, 0x00000000); in gk104_grctx_generate_r419f78()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
A D | padg94.c | 37 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000001); in g94_i2c_pad_mode() 40 nvkm_mask(device, 0x00e500 + base, 0x0000c003, 0x0000c001); in g94_i2c_pad_mode() 41 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000000); in g94_i2c_pad_mode() 44 nvkm_mask(device, 0x00e500 + base, 0x0000c003, 0x00000002); in g94_i2c_pad_mode() 45 nvkm_mask(device, 0x00e50c + base, 0x00000001, 0x00000000); in g94_i2c_pad_mode()
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A D | padgm200.c | 37 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000001); in gm200_i2c_pad_mode() 40 nvkm_mask(device, 0x00d970 + base, 0x0000c003, 0x0000c001); in gm200_i2c_pad_mode() 41 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000000); in gm200_i2c_pad_mode() 44 nvkm_mask(device, 0x00d970 + base, 0x0000c003, 0x00000002); in gm200_i2c_pad_mode() 45 nvkm_mask(device, 0x00d97c + base, 0x00000001, 0x00000000); in gm200_i2c_pad_mode()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
A D | ramnv40.c | 119 nvkm_mask(device, 0x100210, 0x80000000, 0x00000000); /* no auto refresh */ in nv40_ram_prog() 123 nvkm_mask(device, 0x00c040, 0x0000c000, 0x00000000); in nv40_ram_prog() 130 nvkm_mask(device, 0x004044, 0xc0771100, ram->ctrl); in nv40_ram_prog() 131 nvkm_mask(device, 0x00402c, 0xc0771100, ram->ctrl); in nv40_ram_prog() 138 nvkm_mask(device, 0x004038, 0xc0771100, ram->ctrl); in nv40_ram_prog() 142 nvkm_mask(device, 0x004020, 0xc0771100, ram->ctrl); in nv40_ram_prog() 147 nvkm_mask(device, 0x00c040, 0x0000c000, 0x0000c000); in nv40_ram_prog() 151 nvkm_mask(device, 0x100210, 0x80000000, 0x80000000); in nv40_ram_prog()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
A D | gf119.c | 62 nvkm_mask(device, 0x00d610 + (line * 0x04), 0x000000c0, data); in gf119_fan_pwm_ctrl() 100 nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */ in gf119_fan_pwm_set() 127 nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002); in gf119_therm_init() 129 nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line); in gf119_therm_init() 131 nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001); in gf119_therm_init() 133 nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000); in gf119_therm_init()
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