Searched refs:opp_cnt (Results 1 – 11 of 11) sorted by relevance
/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
A D | dcn30_optc.c | 210 static void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc3_set_odm_combine() argument 215 / opp_cnt; in optc3_set_odm_combine() 226 ASSERT(opp_cnt == 2 || opp_cnt == 4); in optc3_set_odm_combine() 231 if (opp_cnt == 2) { in optc3_set_odm_combine() 236 } else if (opp_cnt == 4) { in optc3_set_odm_combine() 247 if (opp_cnt == 2) { in optc3_set_odm_combine() 252 } else if (opp_cnt == 4) { in optc3_set_odm_combine() 264 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc3_set_odm_combine() 265 optc1->opp_count = opp_cnt; in optc3_set_odm_combine()
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/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
A D | dcn31_optc.c | 43 static void optc31_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc31_set_odm_combine() argument 48 / opp_cnt; in optc31_set_odm_combine() 53 if (opp_cnt == 4) { in optc31_set_odm_combine() 73 if (opp_cnt == 2) { in optc31_set_odm_combine() 78 } else if (opp_cnt == 4) { in optc31_set_odm_combine() 90 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine() 91 optc1->opp_count = opp_cnt; in optc31_set_odm_combine()
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/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
A D | dcn20_optc.c | 219 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc2_set_odm_combine() argument 224 / opp_cnt; in optc2_set_odm_combine() 227 ASSERT(opp_cnt == 2); in optc2_set_odm_combine() 257 optc1->opp_count = opp_cnt; in optc2_set_odm_combine()
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A D | dcn20_hwseq.c | 619 int opp_cnt) in calc_mpc_flow_ctrl_cnt() argument 624 if (opp_cnt >= 2) in calc_mpc_flow_ctrl_cnt() 635 if (opp_cnt == 4) in calc_mpc_flow_ctrl_cnt() 651 int opp_cnt = 1; in dcn20_enable_stream_timing() local 670 opp_cnt++; in dcn20_enable_stream_timing() 673 if (opp_cnt > 1) in dcn20_enable_stream_timing() 973 int opp_cnt = 1; in dcn20_update_odm() local 978 opp_cnt++; in dcn20_update_odm() 981 if (opp_cnt > 1) in dcn20_update_odm() 2132 params.opp_cnt = 1; in dcn20_unblank_stream() [all …]
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A D | dcn20_optc.h | 104 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
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A D | dcn20_stream_encoder.c | 466 if (is_two_pixels_per_containter(¶m->timing) || param->opp_cnt > 1) { in enc2_stream_encoder_dp_unblank()
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A D | dcn20_resource.c | 1599 int opp_cnt = 1; in get_pixel_clock_parameters() local 1604 opp_cnt++; in get_pixel_clock_parameters() 1637 if (opp_cnt == 4) in get_pixel_clock_parameters() 1639 else if (optc2_is_two_pixels_per_containter(&stream->timing) || opp_cnt == 2) in get_pixel_clock_parameters() 2480 int opp_cnt = 1; in dcn20_validate_dsc() local 2483 opp_cnt++; in dcn20_validate_dsc() 2490 + stream->timing.h_border_right) / opp_cnt; in dcn20_validate_dsc() 2497 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
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/linux/drivers/gpu/drm/amd/display/dc/core/ |
A D | dc_link_hwss.c | 542 int opp_cnt = 1; local 545 opp_cnt++; 553 …am->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; 559 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); 560 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; 570 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; 571 dsc_cfg.pic_width *= opp_cnt;
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A D | dc_link_dp.c | 5079 int opp_cnt = 1; local 5102 opp_cnt++; 5103 dpg_width = width / opp_cnt; 5146 int opp_cnt = 1; local 5150 opp_cnt++; 5152 dpg_width = width / opp_cnt;
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
A D | stream_encoder.h | 91 int opp_cnt; member
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A D | timing_generator.h | 294 void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,
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