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Searched refs:pfc_divisors (Results 1 – 11 of 11) sorted by relevance

/linux/arch/sh/kernel/cpu/sh2a/
A Dclock-sh7203.c22 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable
23 #define ifc_divisors pfc_divisors
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 return clk->parent->rate / pfc_divisors[idx-2]; in bus_clk_recalc()
A Dclock-sh7201.c19 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable
20 #define ifc_divisors pfc_divisors
37 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
47 return clk->parent->rate / pfc_divisors[idx]; in bus_clk_recalc()
A Dclock-sh7206.c19 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable
20 #define ifc_divisors pfc_divisors
36 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
/linux/arch/sh/kernel/cpu/sh4/
A Dclock-sh4.c24 static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 }; variable
28 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007]; in master_clk_init()
38 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
/linux/arch/sh/kernel/cpu/sh3/
A Dclock-sh7705.c28 static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; variable
32 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003]; in master_clk_init()
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
A Dclock-sh3.c24 static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; variable
31 clk->rate *= pfc_divisors[idx]; in master_clk_init()
43 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
A Dclock-sh7706.c20 static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; variable
27 clk->rate *= pfc_divisors[idx]; in master_clk_init()
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
A Dclock-sh7709.c20 static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; variable
27 clk->rate *= pfc_divisors[idx]; in master_clk_init()
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
/linux/arch/sh/kernel/cpu/sh4a/
A Dclock-sh7770.c17 static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 }; variable
21 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f]; in master_clk_init()
31 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
A Dclock-sh7780.c19 static int pfc_divisors[] = { 1, 24, 24, 1 }; variable
24 clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003]; in master_clk_init()
34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
/linux/arch/sh/kernel/cpu/sh2/
A Dclock-sh7619.c20 static const int pfc_divisors[] = {1,2,0,4}; variable
35 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()

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