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Searched refs:phyclk (Results 1 – 23 of 23) sorted by relevance

/linux/arch/arm/mach-s3c/
A Dsetup-usb-phy-s3c64xx.c26 u32 phyclk; in s3c_usb_otgphy_init() local
31 phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; in s3c_usb_otgphy_init()
37 phyclk |= S3C_PHYCLK_CLKSEL_12M; in s3c_usb_otgphy_init()
40 phyclk |= S3C_PHYCLK_CLKSEL_24M; in s3c_usb_otgphy_init()
51 writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK); in s3c_usb_otgphy_init()
/linux/drivers/phy/samsung/
A Dphy-exynos5250-sata.c50 struct clk *phyclk; member
195 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl"); in exynos_sata_phy_probe()
196 if (IS_ERR(sata_phy->phyclk)) { in exynos_sata_phy_probe()
198 return PTR_ERR(sata_phy->phyclk); in exynos_sata_phy_probe()
201 ret = clk_prepare_enable(sata_phy->phyclk); in exynos_sata_phy_probe()
209 clk_disable_unprepare(sata_phy->phyclk); in exynos_sata_phy_probe()
219 clk_disable_unprepare(sata_phy->phyclk); in exynos_sata_phy_probe()
/linux/drivers/net/wireless/ath/ath10k/
A Dhw.c599 u32 phyclk; in ath10k_hw_qca988x_set_coverage_class() local
624 phyclk = MS(phyclk_reg, WAVE1_PHYCLK_USEC) + 1; in ath10k_hw_qca988x_set_coverage_class()
650 if (slottime_reg % phyclk) { in ath10k_hw_qca988x_set_coverage_class()
658 slottime = slottime / phyclk; in ath10k_hw_qca988x_set_coverage_class()
672 slottime += value * 3 * phyclk; in ath10k_hw_qca988x_set_coverage_class()
679 ack_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
685 cts_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
/linux/drivers/phy/rockchip/
A Dphy-rockchip-inno-hdmi.c246 struct clk *phyclk; member
488 ret = clk_prepare_enable(inno->phyclk); in inno_hdmi_phy_power_on()
494 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_on()
510 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_off()
858 inno->phyclk = devm_clk_register(dev, &inno->hw); in inno_hdmi_phy_clk_register()
859 if (IS_ERR(inno->phyclk)) { in inno_hdmi_phy_clk_register()
860 ret = PTR_ERR(inno->phyclk); in inno_hdmi_phy_clk_register()
865 ret = of_clk_add_provider(np, of_clk_src_simple_get, inno->phyclk); in inno_hdmi_phy_clk_register()
/linux/Documentation/devicetree/bindings/phy/
A Dphy-rockchip-inno-usb2.yaml37 const: phyclk
134 clock-names = "phyclk";
A Drockchip-usb-phy.yaml47 const: phyclk
/linux/Documentation/devicetree/bindings/net/
A Dsti-dwmac.txt21 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
/linux/Documentation/devicetree/bindings/clock/st/
A Dst,flexgen.txt128 "clk-eth-ref-phyclk",
/linux/Documentation/devicetree/bindings/usb/
A Dexynos-usb.txt86 "phyclk",
/linux/Documentation/devicetree/bindings/soc/rockchip/
A Dgrf.yaml249 clock-names = "phyclk";
/linux/arch/arm/boot/dts/
A Dstih407-pinctrl.dtsi218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
260 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
281 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
287 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
A Drk3188.dtsi658 clock-names = "phyclk";
666 clock-names = "phyclk";
A Drk3066a.dtsi692 clock-names = "phyclk";
700 clock-names = "phyclk";
A Drk3288.dtsi907 clock-names = "phyclk";
917 clock-names = "phyclk";
927 clock-names = "phyclk";
A Drk322x.dtsi256 clock-names = "phyclk";
283 clock-names = "phyclk";
A Drv1108.dtsi277 clock-names = "phyclk";
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
A Dmain.h366 bool phyclk; /* phy is out of reset and has clock */ member
A Dmain.c762 wlc_hw->phyclk = clk; in brcms_b_core_phy_clk()
/linux/arch/arm64/boot/dts/exynos/
A Dexynos5433.dtsi1750 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1803 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
/linux/arch/arm64/boot/dts/rockchip/
A Drk3399.dtsi1482 clock-names = "phyclk";
1509 clock-names = "phyclk";
A Drk3308.dtsi192 clock-names = "phyclk";
A Drk3328.dtsi821 clock-names = "phyclk";
A Dpx30.dtsi829 clock-names = "phyclk";

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