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Searched refs:phydev_err (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/net/phy/
A Ddp83867.c432 phydev_err(phydev, in dp83867_set_downshift()
508 phydev_err(phydev, "ti,rx-internal-delay must be specified\n"); in dp83867_verify_rgmii_cfg()
516 phydev_err(phydev, "ti,tx-internal-delay must be specified\n"); in dp83867_verify_rgmii_cfg()
545 phydev_err(phydev, "ti,clk-output-sel value %u out of range\n", in dp83867_of_init()
568 phydev_err(phydev, in dp83867_of_init()
578 phydev_err(phydev, in dp83867_of_init()
601 phydev_err(phydev, "tx-fifo-depth value %u out of range\n", in dp83867_of_init()
612 phydev_err(phydev, "rx-fifo-depth value %u out of range\n", in dp83867_of_init()
A Dnxp-c45-tja11xx.c858 phydev_err(phydev, "delay value smaller than %u\n", MIN_ID_PS); in nxp_c45_check_delay()
863 phydev_err(phydev, "delay value higher than %u\n", MAX_ID_PS); in nxp_c45_check_delay()
930 phydev_err(phydev, in nxp_c45_get_delays()
946 phydev_err(phydev, in nxp_c45_get_delays()
965 phydev_err(phydev, "rgmii mode not supported\n"); in nxp_c45_set_phy_mode()
976 phydev_err(phydev, "rgmii-id, rgmii-txid, rgmii-rxid modes are not supported\n"); in nxp_c45_set_phy_mode()
989 phydev_err(phydev, "mii mode not supported\n"); in nxp_c45_set_phy_mode()
997 phydev_err(phydev, "rev-mii mode not supported\n"); in nxp_c45_set_phy_mode()
1005 phydev_err(phydev, "rmii mode not supported\n"); in nxp_c45_set_phy_mode()
1013 phydev_err(phydev, "sgmii mode not supported\n"); in nxp_c45_set_phy_mode()
[all …]
A Ddp83869.c350 phydev_err(phydev, "Failed to read RX CFG\n"); in dp83869_get_wol()
367 phydev_err(phydev, "Failed to read RX SOP 1\n"); in dp83869_get_wol()
377 phydev_err(phydev, "Failed to read RX SOP 2\n"); in dp83869_get_wol()
387 phydev_err(phydev, "Failed to read RX SOP 3\n"); in dp83869_get_wol()
459 phydev_err(phydev, in dp83869_set_downshift()
A Dmxl-gpy.c147 phydev_err(phydev, "Error: MDIO register access failed: %d\n", in gpy_2500basex_chk()
169 phydev_err(phydev, "Error: MMD register access failed: %d\n", in gpy_sgmii_aneg_en()
276 phydev_err(phydev, in gpy_update_interface()
293 phydev_err(phydev, in gpy_update_interface()
A Dmicrel.c279 phydev_err(phydev, "failed to set led mode\n"); in kszphy_setup_led()
298 phydev_err(phydev, "failed to disable broadcast address\n"); in kszphy_broadcast_disable()
318 phydev_err(phydev, "failed to disable NAND tree mode\n"); in kszphy_nand_tree_disable()
332 phydev_err(phydev, in kszphy_config_reset()
901 phydev_err(phydev, "failed to force the phy to master mode\n"); in ksz9031_config_init()
1362 phydev_err(phydev, "invalid led mode: 0x%02x\n", in kszphy_probe()
1385 phydev_err(phydev, "Clock rate out of range: %ld\n", in kszphy_probe()
1597 phydev_err(phydev, "Error: phy_write has returned error %d\n", in lanphy_write_page_reg()
A Dcortina.c68 phydev_err(phydev, "Error matching phy with %s driver\n", in cortina_probe()
A Dphy_device.c560 phydev_err(dev, "error %d loading PHY driver module for ID 0x%08lx\n", in phy_request_driver_module()
929 phydev_err(phydev, "failed to initialize\n"); in phy_device_register()
935 phydev_err(phydev, "failed to add\n"); in phy_device_register()
1377 phydev_err(phydev, "failed to get the bus module\n"); in phy_attach_direct()
1396 phydev_err(phydev, "failed to get the device driver module\n"); in phy_attach_direct()
1443 phydev_err(phydev, "error creating 'phy_standalone' sysfs entry\n"); in phy_attach_direct()
2324 phydev_err(phydev, "Master/Slave resolution failed, maybe conflicting manual settings?\n"); in genphy_read_lpa()
2326 phydev_err(phydev, "Master/Slave resolution failed\n"); in genphy_read_lpa()
2878 phydev_err(phydev, "Delay %d is out of range\n", delay); in phy_get_internal_delay()
2900 phydev_err(phydev, "error finding internal delay index for %d\n", in phy_get_internal_delay()
A Dat803x.c640 phydev_err(phydev, "failed to register VDDIO regulator\n"); in at8031_register_regulators()
646 phydev_err(phydev, "failed to register VDDH regulator\n"); in at8031_register_regulators()
669 phydev_err(phydev, "invalid qca,smarteee-tw-us-1g\n"); in at803x_parse_dt()
677 phydev_err(phydev, "invalid qca,smarteee-tw-us-100m\n"); in at803x_parse_dt()
699 phydev_err(phydev, "invalid qca,clk-out-frequency\n"); in at803x_parse_dt()
738 phydev_err(phydev, "invalid qca,clk-out-strength\n"); in at803x_parse_dt()
757 phydev_err(phydev, "failed to get VDDIO regulator\n"); in at803x_parse_dt()
A Drockchip.c116 phydev_err(phydev, "rockchip_integrated_phy_analog_init err: %d.\n", in rockchip_link_change_notify()
A Daquantia_main.c198 phydev_err(phydev, "Reading HW Statistics failed for %s\n", in aqr107_get_stats()
A Dadin.c528 phydev_err(phydev, in adin_cl45_to_adin_reg()
A Dphy.c443 phydev_err(phydev, "Error while aborting cable test"); in phy_abort_cable_test()
A Dmarvell10g.c696 phydev_err(phydev, "MACTYPE configuration invalid\n"); in mv3310_config_init()
A Dmarvell.c1949 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); in marvell_vct5_wait_complete()
/linux/include/linux/
A Dphy.h1011 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1109 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1536 #define phydev_err(_phydev, format, args...) \ macro
/linux/net/ethtool/
A Dcabletest.c51 phydev_err(phydev, "%s: Error %pe\n", __func__, ERR_PTR(err)); in ethnl_cable_test_started()
/linux/drivers/net/phy/mscc/
A Dmscc_main.c261 phydev_err(phydev, "Downshift count should be 2,3,4 or 5\n"); in vsc85xx_downshift_set()
428 phydev_err(phydev, "DT %s invalid\n", led); in vsc85xx_dt_led_mode_get()
A Dmscc_ptp.c1573 phydev_err(phydev, "Can't get load-save GPIO (%ld)\n", in vsc8584_ptp_probe()

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