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/linux/drivers/media/cec/core/
A Dcec-pin.c138 bool v = pin->ops->read(pin->adap); in cec_pin_read()
146 pin->ops->low(pin->adap); in cec_pin_low()
152 pin->ops->high(pin->adap); in cec_pin_high()
329 pin->rx_bit = pin->tx_bit = 0; in cec_pin_to_idle()
480 if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) { in cec_pin_tx_states()
581 pin->rx_bit = pin->tx_bit; in cec_pin_tx_states()
1035 struct cec_pin *pin = adap->pin; in cec_pin_thread_func() local
1112 struct cec_pin *pin = adap->pin; in cec_pin_adap_enable() local
1146 struct cec_pin *pin = adap->pin; in cec_pin_adap_log_addr() local
1170 struct cec_pin *pin = adap->pin; in cec_pin_adap_transmit() local
[all …]
A Dcec-pin-error-inj.c55 pin->rx_bit >= 18) in cec_pin_rx_error_inj()
56 cmd = pin->rx_msg.msg[1]; in cec_pin_rx_error_inj()
66 pin->tx_msg.len > 1) in cec_pin_tx_error_inj()
67 cmd = pin->tx_msg.msg[1]; in cec_pin_tx_error_inj()
75 struct cec_pin *pin = adap->pin; in cec_pin_error_inj_parse_line() local
91 memset(pin->error_inj, 0, sizeof(pin->error_inj)); in cec_pin_error_inj_parse_line()
92 pin->rx_toggle = pin->tx_toggle = false; in cec_pin_error_inj_parse_line()
102 pin->rx_toggle = false; in cec_pin_error_inj_parse_line()
108 pin->tx_toggle = false; in cec_pin_error_inj_parse_line()
121 cec_pin_start_timer(pin); in cec_pin_error_inj_parse_line()
[all …]
/linux/drivers/pinctrl/renesas/
A Dpinctrl-rza1.c82 u8 pin: 4; member
99 u16 pin: 4; member
126 { .pin = 0, .func = 1 },
127 { .pin = 1, .func = 1 },
128 { .pin = 2, .func = 1 },
129 { .pin = 3, .func = 1 },
130 { .pin = 4, .func = 1 },
446 u8 pin; member
513 if (bidir_pin->pin == pin && bidir_pin->func == func) in rza1_pinmux_get_bidir()
531 if (swio_pin->port == port && swio_pin->pin == pin && in rza1_pinmux_get_swio()
[all …]
/linux/arch/arm/boot/dts/
A Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
A Dexynos4412-pinctrl.dtsi3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
144 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
151 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
157 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
158 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
185 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
206 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Ds5pv210-pinctrl.dtsi285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
299 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
306 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
313 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
320 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
327 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
334 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
340 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
341 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
[all …]
A Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
170 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
176 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
225 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
226 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
233 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
258 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
272 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
279 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
203 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
210 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
216 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
228 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
264 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
[all …]
A Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
237 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
244 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
288 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
295 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
316 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
36 samsung,pin-val = <_val>; \
42 samsung,pin-function = <_sel>; \
115 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
122 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
142 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
156 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
170 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
A Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
311 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
332 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
346 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
353 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
360 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
395 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
402 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
647 samsung,pin-function = <2>;
648 samsung,pin-pud = <0>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
A Dexynosautov9-pinctrl.dtsi3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as
42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
113 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
119 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
186 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
193 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
278 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
285 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
292 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
313 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
320 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
A Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
253 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
260 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/linux/drivers/pinctrl/qcom/
A Dpinctrl-ssbi-mpp.c176 if (pin->dtest) { in pm8xxx_mpp_update()
179 } else if (pin->input && pin->output) { in pm8xxx_mpp_update()
181 if (pin->high_z) in pm8xxx_mpp_update()
191 if (pin->dtest) in pm8xxx_mpp_update()
198 if (pin->paired) in pm8xxx_mpp_update()
209 if (pin->paired) in pm8xxx_mpp_update()
219 if (pin->dtest) { in pm8xxx_mpp_update()
225 if (pin->paired) in pm8xxx_mpp_update()
351 arg = pin->amux; in pm8xxx_pin_config_get()
498 if (!pin->input) in pm8xxx_mpp_get()
[all …]
A Dpinctrl-ssbi-gpio.c273 if (!pin->disable) in pm8xxx_pin_config_get()
295 if (pin->open_drain) in pm8xxx_pin_config_get()
334 pin->disable = 0; in pm8xxx_pin_config_set()
340 pin->disable = 0; in pm8xxx_pin_config_set()
351 pin->bias = pin->pull_up_strength; in pm8xxx_pin_config_set()
353 pin->disable = 0; in pm8xxx_pin_config_set()
357 pin->disable = 1; in pm8xxx_pin_config_set()
428 if (!pin->inverted) in pm8xxx_pin_config_set()
563 if (pin->disable) { in pm8xxx_gpio_dbg_show_one()
573 if (pin->inverted) in pm8xxx_gpio_dbg_show_one()
[all …]
/linux/drivers/pinctrl/aspeed/
A Dpinmux-aspeed.h652 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument
653 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument
654 #define PIN_SYM(pin) pin_ ## pin argument
660 { #pin, PIN_EXPRS_PTR(pin) }
677 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
695 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
697 FUNC_GROUP_DECL(sig, pin)
719 PIN_DECL_(pin, \
726 PIN_DECL_(pin, \
734 PIN_DECL_(pin, \
[all …]
/linux/arch/arm64/boot/dts/actions/
A Ds900-bubblegum-96.dts94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
100 "GPIO-G", /* GPIO_6, LSEC pin 29 */
101 "GPIO-H", /* GPIO_7, LSEC pin 30 */
102 "GPIO-I", /* GPIO_8, LSEC pin 31 */
103 "GPIO-J", /* GPIO_9, LSEC pin 32 */
[all …]
/linux/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common.c186 if (pin == pin_drv->pin) in mtk_find_pin_drv_grp_by_pin()
236 if (pin == pupd_infos[i].pin) { in mtk_pctrl_spec_pull_set_samereg()
416 if (grp->pin == pin) in mtk_pctrl_find_group_by_pin()
446 if (pin->pin.number == pin_num) { in mtk_pctrl_is_function_valid()
560 pin); in mtk_pctrl_dt_subnode_to_map()
919 group->name = pin->pin.name; in mtk_pctrl_build_state()
920 group->pin = pin->pin.number; in mtk_pctrl_build_state()
922 pctl->grp_names[i] = pin->pin.name; in mtk_pctrl_build_state()
940 *gpio_n = pin->pin.number; in mtk_xt_get_gpio_n()
967 mtk_pmx_set_mode(pctl->pctl_dev, pin->pin.number, pin->eint.eintmux); in mtk_xt_set_gpio_as_eint()
[all …]
/linux/drivers/gpio/
A Dgpio-vr41xx.c114 unsigned int pin; in mask_ack_giuint_low() local
172 unsigned int pin; in mask_ack_giuint_high() local
231 mask = 1 << pin; in vr41xx_set_irq_trigger()
309 mask = 1 << pin; in vr41xx_set_irq_level()
334 if (pin < 16) { in giu_set_direction()
336 mask = 1 << pin; in giu_set_direction()
345 switch (pin) { in giu_set_direction()
381 if (pin < 16) { in vr41xx_gpio_get()
383 mask = 1 << pin; in vr41xx_gpio_get()
410 if (pin < 16) { in vr41xx_gpio_set()
[all …]
A Dgpio-lpc32xx.c201 unsigned pin, int high) in __set_gpio_level_p012() argument
212 unsigned pin, int high) in __set_gpio_level_p3() argument
232 unsigned pin) in __get_gpio_state_p012() argument
235 pin); in __get_gpio_state_p012()
239 unsigned pin) in __get_gpio_state_p3() argument
251 unsigned pin) in __get_gpi_state_p3() argument
257 unsigned pin) in __get_gpo_state_p3() argument
266 unsigned pin) in lpc32xx_gpio_dir_input_p012() argument
276 unsigned pin) in lpc32xx_gpio_dir_input_p3() argument
286 unsigned pin) in lpc32xx_gpio_dir_in_always() argument
[all …]
A Dgpio-zevio.c75 static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) in zevio_gpio_get() argument
82 if (dir & BIT(ZEVIO_GPIO_BIT(pin))) in zevio_gpio_get()
88 return (val >> ZEVIO_GPIO_BIT(pin)) & 0x1; in zevio_gpio_get()
99 val |= BIT(ZEVIO_GPIO_BIT(pin)); in zevio_gpio_set()
101 val &= ~BIT(ZEVIO_GPIO_BIT(pin)); in zevio_gpio_set()
103 zevio_gpio_port_set(controller, pin, ZEVIO_GPIO_OUTPUT, val); in zevio_gpio_set()
115 val |= BIT(ZEVIO_GPIO_BIT(pin)); in zevio_gpio_direction_input()
124 unsigned pin, int value) in zevio_gpio_direction_output() argument
132 val |= BIT(ZEVIO_GPIO_BIT(pin)); in zevio_gpio_direction_output()
134 val &= ~BIT(ZEVIO_GPIO_BIT(pin)); in zevio_gpio_direction_output()
[all …]

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