/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
A D | dcn20_fpu.c | 66 display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context() argument 79 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context() 80 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context() 83 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context() 85 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context() 86 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context() 89 pipes[pipe_cnt].dout.wb.wb_hratio = 1.0; in dcn20_populate_dml_writeback_from_context() 90 pipes[pipe_cnt].dout.wb.wb_vratio = 1.0; in dcn20_populate_dml_writeback_from_context() 93 pipes[pipe_cnt].dout.wb.wb_pixel_format = dm_420_8; in dcn20_populate_dml_writeback_from_context() 95 pipes[pipe_cnt].dout.wb.wb_pixel_format = dm_420_10; in dcn20_populate_dml_writeback_from_context() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
A D | dcn20_resource.c | 2071 pipes[pipe_cnt].pipe.dest.hblank_end = pipes[pipe_cnt].pipe.dest.hblank_start in dcn20_populate_dml_pipes_from_context() 2076 pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start in dcn20_populate_dml_pipes_from_context() 2236 pipes[pipe_cnt].pipe.src.surface_height_y = pipes[pipe_cnt].pipe.src.viewport_height; in dcn20_populate_dml_pipes_from_context() 2237 pipes[pipe_cnt].pipe.src.surface_width_y = pipes[pipe_cnt].pipe.src.viewport_width; in dcn20_populate_dml_pipes_from_context() 2238 pipes[pipe_cnt].pipe.src.surface_height_c = pipes[pipe_cnt].pipe.src.viewport_height; in dcn20_populate_dml_pipes_from_context() 2239 pipes[pipe_cnt].pipe.src.surface_width_c = pipes[pipe_cnt].pipe.src.viewport_width; in dcn20_populate_dml_pipes_from_context() 2841 ASSERT(pipes); in dcn20_fast_validate_bw() 2842 if (!pipes) in dcn20_fast_validate_bw() 3176 pipes, in dcn20_calculate_dlg_params() 3185 &pipes[pipe_idx].pipe); in dcn20_calculate_dlg_params() [all …]
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A D | dcn20_resource.h | 55 display_e2e_pipe_params_st *pipes, 119 display_e2e_pipe_params_st *pipes, 156 display_e2e_pipe_params_st *pipes, 163 display_e2e_pipe_params_st *pipes,
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
A D | dcn301_fpu.c | 221 display_e2e_pipe_params_st *pipes, in calculate_wm_set_for_vlevel() argument 228 pipes[0].clks_cfg.voltage = vlevel; in calculate_wm_set_for_vlevel() 236 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 332 display_e2e_pipe_params_st *pipes, in dcn301_calculate_wm_and_dlg() argument 353 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg() 358 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg() 363 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg() 369 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn301_calculate_wm_and_dlg() 375 …pipes[pipe_idx].clks_cfg.dispclk_mhz = get_dispclk_calculated(&context->bw_ctx.dml, pipes, pipe_cn… in dcn301_calculate_wm_and_dlg() 376 …pipes[pipe_idx].clks_cfg.dppclk_mhz = get_dppclk_calculated(&context->bw_ctx.dml, pipes, pipe_cnt,… in dcn301_calculate_wm_and_dlg() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/core/ |
A D | dc_link_hwss.c | 82 struct pipe_ctx *pipes = in dp_enable_link_phy() local 105 if (pipes[i].stream != NULL && in dp_enable_link_phy() 106 pipes[i].stream->link == link) { in dp_enable_link_phy() 109 pipes[i].clock_source = dp_cs; in dp_enable_link_phy() 113 pipes[i].clock_source, in dp_enable_link_phy() 115 &pipes[i].pll_settings); in dp_enable_link_phy() 433 struct pipe_ctx *pipes = in dp_retrain_link_dp_test() local 438 if (pipes[i].stream != NULL && in dp_retrain_link_dp_test() 439 !pipes[i].top_pipe && !pipes[i].prev_odm_pipe && in dp_retrain_link_dp_test() 456 (&pipes[i])->stream_res.audio->funcs->az_disable((&pipes[i])->stream_res.audio); in dp_retrain_link_dp_test() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
A D | dcn31_resource.c | 1779 display_e2e_pipe_params_st *pipes, in dcn31_populate_dml_pipes_from_context() argument 1804 pipes[pipe_cnt].pipe.src.gpuvm = true; in dcn31_populate_dml_pipes_from_context() 1856 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp() argument 1875 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp() 1876 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp() 1885 pipes[0].clks_cfg.voltage = 1; in dcn31_calculate_wm_and_dlg_fp() 1903 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp() 1904 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp() 1971 …pipes[pipe_idx].clks_cfg.dispclk_mhz = get_dispclk_calculated(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp() 1991 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg() argument [all …]
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/linux/sound/sparc/ |
A D | dbri.c | 769 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; in dbri_initialize() 833 sdp = dbri->pipes[pipe].sdp; in reset_pipe() 854 dbri->pipes[pipe].desc = -1; in reset_pipe() 882 dbri->pipes[pipe].sdp = sdp; in setup_pipe() 883 dbri->pipes[pipe].desc = -1; in setup_pipe() 907 if (dbri->pipes[pipe].sdp == 0 in link_time_slot() 1258 dbri->pipes[16].sdp = 1; in reset_chi() 1259 dbri->pipes[16].nextpipe = 16; in reset_chi() 1783 int td = dbri->pipes[pipe].desc; in transmission_complete_intr() 1802 dbri->pipes[pipe].desc = td; in transmission_complete_intr() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dml/ |
A D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes, 53 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument 59 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level() 64 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level() 169 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument 178 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bw() argument 191 const display_e2e_pipe_params_st *pipes, in get_total_prefetch_bw() argument 672 if (pipes[j].pipe.src.immediate_flip) { in fetch_pipe_params() 721 …mode_lib->vba.GPUVMEnable = mode_lib->vba.GPUVMEnable || !!pipes[k].pipe.src.gpuvm || !!pipes[k].p… in fetch_pipe_params() 760 pipes, in recalculate_params() [all …]
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A D | display_mode_lib.c | 138 display_e2e_pipe_params_st *pipes, in dml_log_pipe_params() argument 150 pipe_src = &(pipes[i].pipe.src); in dml_log_pipe_params() 151 pipe_dest = &(pipes[i].pipe.dest); in dml_log_pipe_params() 152 scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth); in dml_log_pipe_params() 153 scale_taps = &(pipes[i].pipe.scale_taps); in dml_log_pipe_params() 154 dout = &(pipes[i].dout); in dml_log_pipe_params() 155 clks_cfg = &(pipes[i].clks_cfg); in dml_log_pipe_params()
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/linux/drivers/platform/goldfish/ |
A D | goldfish_pipe.c | 522 pipe = dev->pipes[id]; in signalled_pipes_add_locked() 654 if (!dev->pipes[id]) in get_free_pipe_id_locked() 665 if (!pipes) in get_free_pipe_id_locked() 667 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); in get_free_pipe_id_locked() 668 kfree(dev->pipes); in get_free_pipe_id_locked() 669 dev->pipes = pipes; in get_free_pipe_id_locked() 732 dev->pipes[id] = pipe; in goldfish_pipe_open() 830 dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes), in goldfish_pipe_device_init() 832 if (!dev->pipes) { in goldfish_pipe_device_init() 847 kfree(dev->pipes); in goldfish_pipe_device_init() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
A D | dcn30_resource.c | 1461 display_e2e_pipe_params_st *pipes, in dcn30_populate_dml_pipes_from_context() argument 1595 display_e2e_pipe_params_st *pipes, in dcn30_set_mcif_arb_params() argument 1863 display_e2e_pipe_params_st *pipes, in dcn30_internal_validate_bw() argument 1876 ASSERT(pipes); in dcn30_internal_validate_bw() 1877 if (!pipes) in dcn30_internal_validate_bw() 2127 display_e2e_pipe_params_st *pipes, in dcn30_calculate_wm_and_dlg_fp() argument 2139 pipes[0].clks_cfg.voltage = vlevel; in dcn30_calculate_wm_and_dlg_fp() 2149 pipes[0].clks_cfg.voltage = 1; in dcn30_calculate_wm_and_dlg_fp() 2165 pipes[0].clks_cfg.voltage = vlevel; in dcn30_calculate_wm_and_dlg_fp() 2287 display_e2e_pipe_params_st *pipes, in dcn30_calculate_wm_and_dlg() argument [all …]
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A D | dcn30_resource.h | 48 display_e2e_pipe_params_st *pipes, 61 display_e2e_pipe_params_st *pipes, 67 display_e2e_pipe_params_st *pipes, 72 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes); 76 display_e2e_pipe_params_st *pipes,
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/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
A D | dcn21_resource.c | 711 display_e2e_pipe_params_st *pipes, 1039 display_e2e_pipe_params_st *pipes, in calculate_wm_set_for_vlevel() argument 1046 pipes[0].clks_cfg.voltage = vlevel; in calculate_wm_set_for_vlevel() 1098 display_e2e_pipe_params_st *pipes, in dcn21_calculate_wm() argument 1144 context, pipes, fast_validate); in dcn21_calculate_wm() 1147 context, pipes, fast_validate); in dcn21_calculate_wm() 1185 display_e2e_pipe_params_st *pipes, in dcn21_fast_validate_bw() argument 1195 ASSERT(pipes); in dcn21_fast_validate_bw() 1196 if (!pipes) in dcn21_fast_validate_bw() 1381 kfree(pipes); in dcn21_validate_bandwidth_fp() [all …]
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/linux/drivers/gpu/drm/arm/display/komeda/ |
A D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame() 120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events() 147 evt_str(&str, evts->pipes[0]); in komeda_print_events() 149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
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/linux/drivers/gpu/drm/tidss/ |
A D | tidss_kms.c | 127 struct pipe pipes[TIDSS_MAX_PORTS]; in tidss_dispc_modeset_init() local 185 pipes[num_pipes].hw_videoport = i; in tidss_dispc_modeset_init() 186 pipes[num_pipes].bridge = bridge; in tidss_dispc_modeset_init() 187 pipes[num_pipes].enc_type = enc_type; in tidss_dispc_modeset_init() 213 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, in tidss_dispc_modeset_init() 222 enc = tidss_encoder_create(tidss, pipes[i].enc_type, in tidss_dispc_modeset_init() 229 ret = drm_bridge_attach(enc, pipes[i].bridge, NULL, 0); in tidss_dispc_modeset_init()
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/linux/drivers/gpu/drm/omapdrm/ |
A D | omap_drv.c | 137 struct omap_drm_pipeline *pipe = &priv->pipes[i]; in omap_disconnect_pipelines() 167 pipe = &priv->pipes[priv->num_pipes++]; in omap_connect_pipelines() 170 if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) { in omap_connect_pipelines() 282 struct omap_drm_pipeline *pipe = &priv->pipes[i]; in omap_modeset_init() 302 sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]), in omap_modeset_init() 310 struct omap_drm_pipeline *pipe = &priv->pipes[i]; in omap_modeset_init() 321 struct omap_drm_pipeline *pipe = &priv->pipes[i]; in omap_modeset_init() 387 struct drm_connector *connector = priv->pipes[i].connector; in omap_modeset_enable_external_hpd() 392 if (priv->pipes[i].output->bridge) in omap_modeset_enable_external_hpd() 406 struct drm_connector *connector = priv->pipes[i].connector; in omap_modeset_disable_external_hpd() [all …]
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/linux/net/nfc/nci/ |
A D | hci.c | 115 hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes() 116 hdev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes() 126 if (ndev->hci_dev->pipes[i].host == host) { in nci_hci_reset_pipes_per_host() 127 ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes_per_host() 283 u8 gate = ndev->hci_dev->pipes[pipe].gate; in nci_hci_cmd_received() 312 ndev->hci_dev->pipes[new_pipe].gate = dest_gate; in nci_hci_cmd_received() 313 ndev->hci_dev->pipes[new_pipe].host = in nci_hci_cmd_received() 334 ndev->hci_dev->pipes[delete_info->pipe].gate = in nci_hci_cmd_received() 336 ndev->hci_dev->pipes[delete_info->pipe].host = in nci_hci_cmd_received() 684 ndev->hci_dev->pipes[pipe].gate = dest_gate; in nci_hci_connect_gate() [all …]
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/linux/drivers/gpu/drm/arm/display/komeda/d71/ |
A D | d71_dev.c | 188 evts->pipes[0] |= KOMEDA_EVENT_FLIP; in d71_irq_handler() 190 evts->pipes[1] |= KOMEDA_EVENT_FLIP; in d71_irq_handler() 204 evts->pipes[0] |= get_pipeline_event(d71->pipes[0], gcu_status); in d71_irq_handler() 207 evts->pipes[1] |= get_pipeline_event(d71->pipes[1], gcu_status); in d71_irq_handler() 227 pipe = d71->pipes[i]; in d71_enable_irq() 246 pipe = d71->pipes[i]; in d71_disable_irq() 260 struct d71_pipeline *pipe = d71->pipes[master_pipe]; in d71_on_off_vblank() 435 d71->pipes[i] = to_d71_pipeline(pipe); in d71_enum_resources() 578 malidp_write32_mask(d71->pipes[i]->lpu_addr, LPU_TBU_CONTROL, in d71_connect_iommu()
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/linux/drivers/net/wireless/ath/ath6kl/ |
A D | usb.c | 70 struct ath6kl_usb_pipe pipes[ATH6KL_USB_PIPE_MAX]; member 254 ath6kl_usb_free_pipe_resources(&ar_usb->pipes[i]); in ath6kl_usb_cleanup_pipe_resources() 357 pipe = &ar_usb->pipes[pipe_num]; in ath6kl_usb_setup_pipe_resources() 473 if (ar_usb->pipes[i].ar_usb != NULL) in ath6kl_usb_flush_all() 474 usb_kill_anchored_urbs(&ar_usb->pipes[i].urb_submitted); in ath6kl_usb_flush_all() 495 ar_usb->pipes[ATH6KL_USB_PIPE_RX_DATA].urb_cnt_thresh = 1; in ath6kl_usb_start_recv_pipes() 644 pipe = &ar_usb->pipes[i]; in ath6kl_usb_create() 700 device->pipes[i].urb_cnt_thresh = in hif_start() 701 device->pipes[i].urb_alloc / 2; in hif_start() 709 struct ath6kl_usb_pipe *pipe = &device->pipes[PipeID]; in ath6kl_usb_send() [all …]
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/linux/Documentation/driver-api/ |
A D | xillybus.rst | 17 -- Seekable pipes 23 -- Channels, pipes, and the message channel 85 project to another (the number of data pipes needed in each direction and 90 Xillybus presents independent data streams, which resemble pipes or TCP/IP 138 device files are treated like two independent pipes (except for sharing a 144 Xillybus pipes are configured (on the IP core) to be either synchronous or 154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA 159 In summary, for synchronous pipes, data between the host and FPGA is 169 Seekable pipes 228 Seekable pipes above. [all …]
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/linux/drivers/net/wireless/ath/ath10k/ |
A D | usb.c | 120 ath10k_usb_free_pipe_resources(ar, &ar_usb->pipes[i]); in ath10k_usb_cleanup_pipe_resources() 264 if (ar_usb->pipes[i].ar_usb) { in ath10k_usb_flush_all() 266 cancel_work_sync(&ar_usb->pipes[i].io_complete_work); in ath10k_usb_flush_all() 278 &ar_usb->pipes[ATH10K_USB_PIPE_RX_DATA]); in ath10k_usb_start_recv_pipes() 395 ar_usb->pipes[i].urb_cnt_thresh = in ath10k_usb_hif_start() 396 ar_usb->pipes[i].urb_alloc / 2; in ath10k_usb_hif_start() 406 struct ath10k_usb_pipe *pipe = &ar_usb->pipes[pipe_id]; in ath10k_usb_hif_tx_sg() 471 return ar_usb->pipes[pipe_id].urb_cnt; in ath10k_usb_hif_get_free_queue_number() 869 pipe = &ar_usb->pipes[pipe_num]; in ath10k_usb_setup_pipe_resources() 939 pipe = &ar_usb->pipes[i]; in ath10k_usb_create() [all …]
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/linux/Documentation/filesystems/ |
A D | splice.rst | 2 splice and pipes 13 pipes API
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/linux/net/nfc/hci/ |
A D | core.c | 42 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes() 43 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes() 54 if (hdev->pipes[i].dest_host != host) in nfc_hci_reset_pipes_per_host() 57 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes_per_host() 58 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes_per_host() 197 gate = hdev->pipes[pipe].gate; in nfc_hci_cmd_received() 218 hdev->pipes[create_info->pipe].gate = create_info->dest_gate; in nfc_hci_cmd_received() 219 hdev->pipes[create_info->pipe].dest_host = in nfc_hci_cmd_received() 240 hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; in nfc_hci_cmd_received() 241 hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_cmd_received() [all …]
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/linux/drivers/staging/media/atomisp/pci/ |
A D | sh_css.c | 8924 assert(pipes); 8926 assert(pipes[i]); 8931 return pipes[i]; 9070 !pipes) { 9171 curr_stream->pipes[i] = pipes[i]; 9250 curr_pipe = pipes[i]; 9386 curr_pipe = pipes[i]; 9492 my_css_save.stream_seeds[i].pipes[j] = pipes[j]; 9608 kfree(stream->pipes); 9609 stream->pipes = NULL; [all …]
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/linux/drivers/gpu/drm/amd/display/dc/inc/ |
A D | core_types.h | 111 display_e2e_pipe_params_st *pipes, 119 display_e2e_pipe_params_st *pipes, 173 display_e2e_pipe_params_st *pipes); 178 display_e2e_pipe_params_st *pipes,
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