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Searched refs:pix_clk_params (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clock_source.c404 switch (pix_clk_params->signal_type) { in pll_adjust_pix_clk()
496 pix_clk_params->signal_type, in dce110_get_pix_clk_dividers_helper()
592 pll_settings, pix_clk_params); in dce110_get_pix_clk_dividers()
624 pll_settings, pix_clk_params); in dce112_get_pix_clk_dividers()
873 switch (pix_clk_params->color_depth) { in dce110_program_pix_clk()
898 if (pix_clk_params->flags.ENABLE_SS) in dce110_program_pix_clk()
900 pix_clk_params->signal_type, in dce110_program_pix_clk()
906 pix_clk_params->signal_type, in dce110_program_pix_clk()
907 pix_clk_params->color_depth); in dce110_program_pix_clk()
967 pix_clk_params->signal_type, in dce112_program_pix_clk()
[all …]
A Ddce_clk_mgr.c199 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) in get_max_pixel_clock_for_all_paths()
200 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; in get_max_pixel_clock_for_all_paths()
206 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) in get_max_pixel_clock_for_all_paths()
207 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; in get_max_pixel_clock_for_all_paths()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
A Ddce_clk_mgr.c180 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) in dce_get_max_pixel_clock_for_all_paths()
181 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; in dce_get_max_pixel_clock_for_all_paths()
187 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) in dce_get_max_pixel_clock_for_all_paths()
188 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; in dce_get_max_pixel_clock_for_all_paths()
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h315 struct pixel_clk_params pix_clk_params; member
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_hwss.c110 pipes[i].stream_res.pix_clk_params.requested_pix_clk_100hz = in dp_enable_link_phy()
114 &pipes[i].stream_res.pix_clk_params, in dp_enable_link_phy()
A Ddc_link.c1920 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk = in enable_link_dp()
1927 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk = in enable_link_dp()
A Ddc.c1170 pipe->stream_res.pix_clk_params.requested_pix_clk_100hz; in disable_vbios_mode_if_required()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_hw_sequencer.c1378 pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz;
1381 pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz;
1387 if (pipe_ctx->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
1391 pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz/2;
1486 &pipe_ctx->stream_res.pix_clk_params,
A Ddce110_resource.c919 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in dce110_resource_build_pipe_hw_param()
922 &pipe_ctx->stream_res.pix_clk_params, in dce110_resource_build_pipe_hw_param()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_resource.c1103 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in build_pipe_hw_param()
1107 &pipe_ctx->stream_res.pix_clk_params, in build_pipe_hw_param()
A Ddcn10_hw_sequencer_debug.c432 …pix_clk = dc->current_state->res_ctx.pipe_ctx[i].stream_res.pix_clk_params.requested_pix_clk_100hz… in dcn10_get_otg_states()
A Ddcn10_hw_sequencer.c897 &pipe_ctx->stream_res.pix_clk_params, in dcn10_enable_stream_timing()
2041 if (pipe->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) in get_clock_divider()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c1657 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in build_pipe_hw_param()
1661 &pipe_ctx->stream_res.pix_clk_params, in build_pipe_hw_param()
A Ddcn20_hwseq.c686 &pipe_ctx->stream_res.pix_clk_params, in dcn20_enable_stream_timing()

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