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Searched refs:pixel_clk (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/media/platform/cadence/
A Dcdns-csi2rx.c70 struct clk *pixel_clk[CSI2RX_STREAMS_MAX]; member
153 ret = clk_prepare_enable(csi2rx->pixel_clk[i]); in csi2rx_start()
178 clk_disable_unprepare(csi2rx->pixel_clk[i - 1]); in csi2rx_start()
196 clk_disable_unprepare(csi2rx->pixel_clk[i]); in csi2rx_stop()
355 csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); in csi2rx_get_resources()
356 if (IS_ERR(csi2rx->pixel_clk[i])) { in csi2rx_get_resources()
358 return PTR_ERR(csi2rx->pixel_clk[i]); in csi2rx_get_resources()
A Dcdns-csi2tx.c107 struct clk *pixel_clk[CSI2TX_STREAMS_MAX]; member
485 csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); in csi2tx_get_resources()
486 if (IS_ERR(csi2tx->pixel_clk[i])) { in csi2tx_get_resources()
489 return PTR_ERR(csi2tx->pixel_clk[i]); in csi2tx_get_resources()
/linux/drivers/gpu/drm/i915/display/
A Dintel_audio.c524 unsigned int h_active, h_total, hblank_delta, pixel_clk; in calc_hblank_early_prog() local
531 pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock; in calc_hblank_early_prog()
543 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bpp || !cdclk)) in calc_hblank_early_prog()
546 link_clks_available = (h_total - h_active) * link_clk / pixel_clk - 28; in calc_hblank_early_prog()
552 hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + cdclk), pixel_clk), in calc_hblank_early_prog()
555 tu_data = div64_u64(mul_u32_u32(pixel_clk * vdsc_bpp * 8, 1000000), in calc_hblank_early_prog()
558 mul_u32_u32(64 * pixel_clk, 1000000)); in calc_hblank_early_prog()
568 unsigned int h_active, h_total, pixel_clk; in calc_samples_room() local
573 pixel_clk = crtc_state->hw.adjusted_mode.clock; in calc_samples_room()
577 return ((h_total - h_active) * link_clk - 12 * pixel_clk) / in calc_samples_room()
[all …]
/linux/drivers/gpu/drm/mediatek/
A Dmtk_dpi.c74 struct clk *pixel_clk; member
413 clk_disable_unprepare(dpi->pixel_clk); in mtk_dpi_power_off()
430 ret = clk_prepare_enable(dpi->pixel_clk); in mtk_dpi_power_on()
477 clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); in mtk_dpi_set_display_mode()
479 clk_set_rate(dpi->pixel_clk, vm.pixelclock); in mtk_dpi_set_display_mode()
482 vm.pixelclock = clk_get_rate(dpi->pixel_clk); in mtk_dpi_set_display_mode()
878 dpi->pixel_clk = devm_clk_get(dev, "pixel"); in mtk_dpi_probe()
879 if (IS_ERR(dpi->pixel_clk)) { in mtk_dpi_probe()
880 ret = PTR_ERR(dpi->pixel_clk); in mtk_dpi_probe()
/linux/drivers/gpu/drm/stm/
A Dltdc.c476 result = clk_round_rate(ldev->pixel_clk, target); in ltdc_crtc_mode_valid()
512 if (clk_set_rate(ldev->pixel_clk, rate) < 0) { in ltdc_crtc_mode_fixup()
1195 clk_disable_unprepare(ldev->pixel_clk); in ltdc_suspend()
1205 ret = clk_prepare_enable(ldev->pixel_clk); in ltdc_resume()
1235 ldev->pixel_clk = devm_clk_get(dev, "lcd"); in ltdc_load()
1236 if (IS_ERR(ldev->pixel_clk)) { in ltdc_load()
1237 if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER) in ltdc_load()
1239 return PTR_ERR(ldev->pixel_clk); in ltdc_load()
1242 if (clk_prepare_enable(ldev->pixel_clk)) { in ltdc_load()
1348 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()
[all …]
A Dltdc.h34 struct clk *pixel_clk; /* lcd pixel clock */ member
/linux/drivers/gpu/drm/msm/edp/
A Dedp_ctrl.c65 struct clk *pixel_clk; member
155 ctrl->pixel_clk = msm_clk_get(pdev, "pixel"); in edp_clk_init()
156 if (IS_ERR(ctrl->pixel_clk)) { in edp_clk_init()
157 ret = PTR_ERR(ctrl->pixel_clk); in edp_clk_init()
159 ctrl->pixel_clk = NULL; in edp_clk_init()
237 ret = clk_set_rate(ctrl->pixel_clk, in edp_clk_enable()
245 ret = clk_prepare_enable(ctrl->pixel_clk); in edp_clk_enable()
263 clk_disable_unprepare(ctrl->pixel_clk); in edp_clk_enable()
282 clk_disable_unprepare(ctrl->pixel_clk); in edp_clk_disable()
/linux/drivers/gpu/drm/msm/dsi/
A Ddsi_host.c114 struct clk *pixel_clk; member
398 msm_host->pixel_clk = msm_clk_get(pdev, "pixel"); in dsi_clk_init()
399 if (IS_ERR(msm_host->pixel_clk)) { in dsi_clk_init()
400 ret = PTR_ERR(msm_host->pixel_clk); in dsi_clk_init()
403 msm_host->pixel_clk = NULL; in dsi_clk_init()
423 msm_host->pixel_clk_src = clk_get_parent(msm_host->pixel_clk); in dsi_clk_init()
520 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
536 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
602 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_v2()
625 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_disable_6g()
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
A Ddw-hdmi.c586 if (pixel_clk == 25175000) in hdmi_compute_n()
588 else if (pixel_clk == 27027000) in hdmi_compute_n()
590 else if (pixel_clk == 74176000 || pixel_clk == 148352000) in hdmi_compute_n()
598 if (pixel_clk == 25175000) in hdmi_compute_n()
600 else if (pixel_clk == 74176000) in hdmi_compute_n()
602 else if (pixel_clk == 148352000) in hdmi_compute_n()
610 if (pixel_clk == 25175000) in hdmi_compute_n()
612 else if (pixel_clk == 27027000) in hdmi_compute_n()
614 else if (pixel_clk == 74176000) in hdmi_compute_n()
616 else if (pixel_clk == 148352000) in hdmi_compute_n()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dclock_source.h176 unsigned int pixel_clk,
/linux/drivers/gpu/drm/aspeed/
A Daspeed_gfx_crtc.c93 clk_set_rate(priv->pixel_clk, m->crtc_clock * 1000); in aspeed_gfx_crtc_mode_set_nofb()
/linux/drivers/gpu/ipu-v3/
A Dipu-csi.c192 static int ipu_csi_set_testgen_mclk(struct ipu_csi *csi, u32 pixel_clk, in ipu_csi_set_testgen_mclk() argument
198 div_ratio = (ipu_clk / pixel_clk) - 1; in ipu_csi_set_testgen_mclk()
/linux/drivers/gpu/drm/amd/display/include/
A Dgrph_object_ctrl_defs.h128 uint32_t pixel_clk; /* in KHz */ member
/linux/drivers/gpu/drm/amd/display/dc/bios/
A Dcommand_table.c1541 uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; in adjust_display_pll_v2() local
1545 div_u64(pixel_clk * pixel_clk_10_khz_out, in adjust_display_pll_v2()
1591 uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; in adjust_display_pll_v3() local
1595 div_u64(pixel_clk * pixel_clk_10_khz_out, in adjust_display_pll_v3()
A Dbios_parser.c1236 info->lcd_timing.pixel_clk = in get_embedded_panel_info_v1_2()
1354 info->lcd_timing.pixel_clk = in get_embedded_panel_info_v1_3()
A Dbios_parser2.c1141 info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10; in get_embedded_panel_info_v2_1()
/linux/drivers/video/fbdev/
A Dmx3fb.c506 uint32_t pixel_clk, in sdc_init_panel() argument
567 div = clk_get_rate(ipu_clk) * 16 / pixel_clk; in sdc_init_panel()
580 pixel_clk, div >> 4, (div & 7) * 125); in sdc_init_panel()
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clock_source.c1109 unsigned int pixel_clk, in dcn20_override_dp_pix_clk() argument
1115 REG_WRITE(PHASE[inst], pixel_clk); in dcn20_override_dp_pix_clk()
/linux/drivers/gpu/drm/i915/gvt/
A Dhandlers.c676 u64 pixel_clk = 0; in vgpu_update_refresh_rate() local
681 pixel_clk = div_u64(mul_u32_u32(link_m, dp_br), link_n); in vgpu_update_refresh_rate()
682 pixel_clk *= MSEC_PER_SEC; in vgpu_update_refresh_rate()
685 …new_rate = DIV64_U64_ROUND_CLOSEST(mul_u64_u32_shr(pixel_clk, MSEC_PER_SEC, 0), mul_u32_u32(htotal… in vgpu_update_refresh_rate()

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