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Searched refs:pixelclock (Results 1 – 25 of 71) sorted by relevance

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/linux/drivers/gpu/drm/omapdrm/dss/
A Dsdi.c31 unsigned long pixelclock; member
147 unsigned long pixelclock = mode->clock * 1000; in sdi_bridge_mode_valid() local
152 if (pixelclock == 0) in sdi_bridge_mode_valid()
155 ret = sdi_calc_clock_div(sdi, pixelclock, &fck, &dispc_cinfo); in sdi_bridge_mode_valid()
167 unsigned long pixelclock = mode->clock * 1000; in sdi_bridge_mode_fixup() local
173 ret = sdi_calc_clock_div(sdi, pixelclock, &fck, &dispc_cinfo); in sdi_bridge_mode_fixup()
179 if (pck != pixelclock) in sdi_bridge_mode_fixup()
182 pixelclock, pck); in sdi_bridge_mode_fixup()
195 sdi->pixelclock = adjusted_mode->clock * 1000; in sdi_bridge_mode_set()
213 r = sdi_calc_clock_div(sdi, sdi->pixelclock, &fck, &dispc_cinfo); in sdi_bridge_enable()
A Ddpi.c40 unsigned long pixelclock; member
334 r = dpi_set_pll_clk(dpi, dpi->pixelclock); in dpi_set_mode()
336 r = dpi_set_dispc_clk(dpi, dpi->pixelclock); in dpi_set_mode()
480 dpi->pixelclock = adjusted_mode->clock * 1000; in dpi_bridge_mode_set()
/linux/drivers/media/i2c/
A Dths7303.c145 state->bt.pixelclock = 0; in ths7303_s_std_output()
170 if (state->bt.pixelclock > 120000000) in ths7303_config()
172 else if (state->bt.pixelclock > 70000000) in ths7303_config()
174 else if (state->bt.pixelclock > 20000000) in ths7303_config()
287 if (state->bt.pixelclock) { in ths7303_log_status()
297 (int)bt->pixelclock / in ths7303_log_status()
300 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
A Dad9389b.c267 static void ad9389b_set_manual_pll_gear(struct v4l2_subdev *sd, u32 pixelclock) in ad9389b_set_manual_pll_gear() argument
284 if (pixelclock > 140000000) in ad9389b_set_manual_pll_gear()
286 else if (pixelclock > 117000000) in ad9389b_set_manual_pll_gear()
288 else if (pixelclock > 87000000) in ad9389b_set_manual_pll_gear()
290 else if (pixelclock > 60000000) in ad9389b_set_manual_pll_gear()
613 ad9389b_set_manual_pll_gear(sd, (u32)timings->bt.pixelclock); in ad9389b_s_dv_timings()
/linux/drivers/video/fbdev/omap2/omapfb/dss/
A Ddpi.c334 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck, in dpi_set_mode()
337 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck, in dpi_set_mode()
344 if (pck != t->pixelclock) { in dpi_set_mode()
346 t->pixelclock, pck); in dpi_set_mode()
348 t->pixelclock = pck; in dpi_set_mode()
508 if (timings->pixelclock == 0) in dpi_check_timings()
512 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx); in dpi_check_timings()
518 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx); in dpi_check_timings()
530 timings->pixelclock = pck; in dpi_check_timings()
A Dsdi.c145 r = sdi_calc_clock_div(t->pixelclock, &fck, &dispc_cinfo); in sdi_display_enable()
153 if (pck != t->pixelclock) { in sdi_display_enable()
155 t->pixelclock, pck); in sdi_display_enable()
157 t->pixelclock = pck; in sdi_display_enable()
239 if (timings->pixelclock == 0) in sdi_check_timings()
A Ddisplay.c264 ovt->pixelclock = vm->pixelclock; in videomode_to_omap_video_timings()
296 vm->pixelclock = ovt->pixelclock; in omap_video_timings_to_videomode()
A Dhdmi5.c176 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
279 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
370 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
664 hd->cfg.timings.pixelclock); in hdmi_audio_config()
A Dhdmi4.c164 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
258 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
340 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
632 hd->cfg.timings.pixelclock); in hdmi_audio_config()
A Ddisplay-sysfs.c97 t.pixelclock, in display_timings_show()
122 &t.pixelclock, in display_timings_store()
/linux/drivers/gpu/drm/panel/
A Dpanel-simple.c781 .pixelclock = { 26400000, 33300000, 46800000 },
855 .pixelclock = { 33300000, 34209000, 45000000 },
1299 .pixelclock = { 68900000, 71100000, 73400000 },
1430 .pixelclock = { 45000000, 51200000, 57000000 },
1460 .pixelclock = { 68900000, 71100000, 73400000 },
1689 .pixelclock = { 40000000, 40000000, 40000000 },
1716 .pixelclock = { 27600000, 33300000, 50000000 },
1851 .pixelclock = { 13500000, 27000000, 27500000 },
1876 .pixelclock = { 64300000, 71100000, 82000000 },
2167 .pixelclock = { 5580000, 5850000, 6200000 },
[all …]
A Dpanel-olimex-lcd-olinuxino.c28 u32 pixelclock; member
160 mode->clock = lcd_mode->pixelclock; in lcd_olinuxino_get_modes()
/linux/drivers/gpu/ipu-v3/
A Dipu-di.c424 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
427 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
444 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
448 error = rate / (sig->mode.pixelclock / 1000); in ipu_di_config_clock()
464 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
467 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
494 sig->mode.pixelclock, in ipu_di_config_clock()
572 sig->mode.pixelclock); in ipu_di_init_sync_panel()
/linux/drivers/media/v4l2-core/
A Dv4l2-dv-timings.c156 bt->pixelclock < cap->min_pixelclock || in v4l2_valid_dv_timings()
157 bt->pixelclock > cap->max_pixelclock || in v4l2_valid_dv_timings()
255 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta && in v4l2_match_dv_timings()
256 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta && in v4l2_match_dv_timings()
290 fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock), in v4l2_print_dv_timings()
316 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock); in v4l2_print_dv_timings()
398 pclk = bt->pixelclock; in v4l2_calc_timeperframe()
630 fmt->bt.pixelclock = pix_clk; in v4l2_detect_cvt()
788 fmt->bt.pixelclock = pix_clk; in v4l2_detect_gtf()
/linux/drivers/video/
A Dvideomode.c16 vm->pixelclock = dt->pixelclock.typ; in videomode_from_timing()
/linux/drivers/media/i2c/adv748x/
A Dadv748x-hdmi.c278 int pixelclock; in adv748x_hdmi_query_dv_timings() local
289 pixelclock = adv748x_hdmi_read_pixelclock(state); in adv748x_hdmi_query_dv_timings()
290 if (pixelclock < 0) in adv748x_hdmi_query_dv_timings()
295 bt->pixelclock = pixelclock; in adv748x_hdmi_query_dv_timings()
408 return adv748x_csi2_set_pixelrate(tx, timings.bt.pixelclock); in adv748x_hdmi_propagate_pixelrate()
/linux/drivers/gpu/drm/bridge/analogix/
A Danx7625.c289 static int anx7625_calculate_m_n(u32 pixelclock, in anx7625_calculate_m_n() argument
297 pixelclock, in anx7625_calculate_m_n()
305 pixelclock, in anx7625_calculate_m_n()
311 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));) in anx7625_calculate_m_n()
316 (pixelclock < in anx7625_calculate_m_n()
339 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) { in anx7625_calculate_m_n()
341 pixelclock * (*post_divider), in anx7625_calculate_m_n()
346 *m = pixelclock; in anx7625_calculate_m_n()
427 (ctx->dt.pixelclock.min / 1000) & 0xFF); in anx7625_dsi_video_timing_config()
429 (ctx->dt.pixelclock.min / 1000) >> 8); in anx7625_dsi_video_timing_config()
[all …]
/linux/drivers/gpu/drm/mediatek/
A Dmtk_dpi.c466 pll_rate = vm.pixelclock * factor; in mtk_dpi_set_display_mode()
469 pll_rate, vm.pixelclock); in mtk_dpi_set_display_mode()
474 vm.pixelclock = pll_rate / factor; in mtk_dpi_set_display_mode()
477 clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2); in mtk_dpi_set_display_mode()
479 clk_set_rate(dpi->pixel_clk, vm.pixelclock); in mtk_dpi_set_display_mode()
482 vm.pixelclock = clk_get_rate(dpi->pixel_clk); in mtk_dpi_set_display_mode()
485 pll_rate, vm.pixelclock); in mtk_dpi_set_display_mode()
/linux/include/video/
A Dvideomode.h19 unsigned long pixelclock; /* pixelclock in Hz */ member
A Ddisplay_timing.h64 struct timing_entry pixelclock; member
/linux/Documentation/userspace-api/media/v4l/
A Dvidioc-dv-timings-cap.rst81 - Minimum pixelclock frequency in Hz.
84 - Maximum pixelclock frequency in Hz.
/linux/drivers/gpu/drm/xen/
A Dxen_drm_front_conn.c80 videomode.pixelclock = width * height * XEN_DRM_CRTC_VREFRESH_HZ; in connector_get_modes()
/linux/Documentation/fb/
A Dmodedb.rst92 pixelclock, the horizontal sync frequency, or the vertical refresh rate.
95 It artificially increases the pixelclock because of its high blanking
97 data rate which requires that it conserves the pixelclock as much as possible.
/linux/drivers/gpu/drm/imx/dcss/
A Ddcss-dtg.c210 u32 pixclock = vm->pixelclock; in dcss_dtg_sync_set()
224 clk_set_rate(dcss->pix_clk, vm->pixelclock); in dcss_dtg_sync_set()
/linux/drivers/media/test-drivers/vivid/
A Dvivid-vid-out.c221 u64 pixelclock; in vivid_update_format_out() local
245 pixelclock = div_u64(bt->pixelclock * 1000, 1001); in vivid_update_format_out()
247 pixelclock = bt->pixelclock; in vivid_update_format_out()
250 size / 100, (u32)pixelclock / 100 in vivid_update_format_out()

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