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Searched refs:plane_id (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/kmb/
A Dkmb_plane.c73 int plane_id = kmb_plane->id; in check_pixel_format() local
99 int plane_id = kmb_plane->id; in kmb_plane_atomic_check() local
146 int plane_id = kmb_plane->id; in kmb_plane_atomic_disable() local
151 if (WARN_ON(plane_id >= KMB_MAX_PLANES)) in kmb_plane_atomic_disable()
154 switch (plane_id) { in kmb_plane_atomic_disable()
169 kmb->plane_status[plane_id].disable = true; in kmb_plane_atomic_disable()
312 unsigned char plane_id, in kmb_plane_set_alpha() argument
364 unsigned char plane_id; in kmb_plane_atomic_update() local
380 plane_id = kmb_plane->id; in kmb_plane_atomic_update()
471 config_csc(kmb, plane_id); in kmb_plane_atomic_update()
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A Dkmb_drv.c203 int plane_id, dma0_state, dma1_state; in handle_lcd_irq() local
219 for (plane_id = LAYER_0; in handle_lcd_irq()
220 plane_id < KMB_MAX_PLANES; plane_id++) { in handle_lcd_irq()
221 if (kmb->plane_status[plane_id].disable) { in handle_lcd_irq()
224 (plane_id), in handle_lcd_irq()
228 kmb->plane_status[plane_id].ctrl); in handle_lcd_irq()
243 kmb->plane_status[plane_id].disable = false; in handle_lcd_irq()
/linux/drivers/gpu/drm/i915/display/
A Dskl_universal_plane.c286 enum plane_id plane_id) in icl_is_nv12_y_plane() argument
547 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
649 enum plane_id plane_id = plane->id; in skl_disable_plane() local
673 enum plane_id plane_id = plane->id; in skl_plane_get_hw_state() local
1045 enum plane_id plane_id = plane->id; in skl_program_plane() local
1178 enum plane_id plane_id = plane->id; in skl_plane_async_flip() local
1816 enum pipe pipe, enum plane_id plane_id) in skl_plane_has_planar() argument
1832 enum pipe pipe, enum plane_id plane_id, in skl_get_plane_formats() argument
1957 enum plane_id plane_id) in gen12_plane_supports_mc_ccs() argument
2043 enum plane_id plane_id) in gen12_get_plane_modifiers() argument
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A Dskl_universal_plane.h17 enum plane_id;
21 enum pipe pipe, enum plane_id plane_id);
32 enum plane_id plane_id);
33 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
A Dintel_sprite.c126 enum plane_id plane_id = plane->id; in chv_update_csc() local
157 intel_de_write_fw(dev_priv, SPCSCYGOFF(plane_id), in chv_update_csc()
164 intel_de_write_fw(dev_priv, SPCSCC01(plane_id), in chv_update_csc()
166 intel_de_write_fw(dev_priv, SPCSCC23(plane_id), in chv_update_csc()
168 intel_de_write_fw(dev_priv, SPCSCC45(plane_id), in chv_update_csc()
170 intel_de_write_fw(dev_priv, SPCSCC67(plane_id), in chv_update_csc()
199 enum plane_id plane_id = plane->id; in vlv_update_clrc() local
402 enum plane_id plane_id = plane->id; in vlv_update_gamma() local
426 enum plane_id plane_id = plane->id; in vlv_update_plane() local
493 enum plane_id plane_id = plane->id; in vlv_disable_plane() local
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A Dintel_atomic_plane.c375 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id) in intel_crtc_get_plane() argument
381 if (plane->id == plane_id) in intel_crtc_get_plane()
445 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
448 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
451 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
453 I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
454 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id], in skl_next_plane_to_commit()
456 I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
459 *update_mask &= ~BIT(plane_id); in skl_next_plane_to_commit()
460 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_next_plane_to_commit()
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A Dintel_bw.c439 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
441 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_bw_crtc_data_rate()
446 if (plane_id == PLANE_CURSOR) in intel_bw_crtc_data_rate()
449 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
546 enum plane_id plane_id; in skl_bw_calc_min_cdclk() local
562 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_bw_calc_min_cdclk()
564 &crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_bw_calc_min_cdclk()
566 &crtc_state->wm.skl.plane_ddb_uv[plane_id]; in skl_bw_calc_min_cdclk()
567 unsigned int data_rate = crtc_state->data_rate[plane_id]; in skl_bw_calc_min_cdclk()
A Dintel_display_debugfs.c1211 enum plane_id plane_id; in i915_ddb_info() local
1215 for_each_plane_id_on_crtc(crtc, plane_id) { in i915_ddb_info()
1216 entry = &crtc_state->wm.skl.plane_ddb_y[plane_id]; in i915_ddb_info()
1217 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, in i915_ddb_info()
A Dintel_display.h174 enum plane_id { enum
A Dintel_display_types.h1336 enum plane_id id;
/linux/drivers/gpu/drm/i915/
A Dintel_pm.c1343 enum plane_id plane_id; in g4x_invalidate_wms() local
1392 enum plane_id plane_id; in g4x_compute_pipe_wm() local
1472 enum plane_id plane_id; in g4x_compute_intermediate_wm() local
1724 enum plane_id plane_id; in vlv_compute_fifo() local
1801 enum plane_id plane_id; in vlv_invalidate_wms() local
1916 enum plane_id plane_id; in vlv_compute_pipe_wm() local
2131 enum plane_id plane_id; in vlv_compute_intermediate_wm() local
3897 enum plane_id plane_id; in skl_crtc_can_enable_sagv() local
3949 enum plane_id plane_id; in tgl_crtc_can_enable_sagv() local
4341 enum plane_id plane_id; in skl_pipe_ddb_get_hw_state() local
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A Dintel_pm.h55 enum plane_id plane_id,
58 enum plane_id plane_id);
A Di915_reg.h7116 #define SPCSCYGOFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d900) argument
7117 #define SPCSCCBOFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d904) argument
7118 #define SPCSCCROFF(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d908) argument
7122 #define SPCSCC01(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d90c) argument
7123 #define SPCSCC23(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d910) argument
7124 #define SPCSCC45(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d914) argument
7125 #define SPCSCC67(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d918) argument
7126 #define SPCSCC8(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d91c) argument
7130 #define SPCSCYGICLAMP(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d920) argument
7131 #define SPCSCCBICLAMP(plane_id) _MMIO_CHV_SPCSC(plane_id, 0x6d924) argument
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A Di915_drv.h1311 #define INTEL_FRONTBUFFER(pipe, plane_id) ({ \ argument
1314 BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe)); \
/linux/drivers/gpu/drm/sti/
A Dsti_mixer.c239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mask); in sti_mixer_set_plane_depth()
284 val |= plane_id; in sti_mixer_set_plane_depth()
/linux/drivers/gpu/drm/i915/gvt/
A Ddmabuf.c267 int plane_id) in vgpu_get_plane_info() argument
275 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
305 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
327 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
A Dhandlers.c1052 enum plane_id plane = REG_50080_TO_PLANE(offset); in reg50080_mmio_write()
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_trace.h637 TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
641 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
645 __field( uint32_t, plane_id )
659 __entry->plane_id = plane_id;
675 __entry->crtc_id, __entry->plane_id, __entry->fb_id,
/linux/include/uapi/drm/
A Ddrm_mode.h297 __u32 plane_id; member
334 __u32 plane_id; member
A Di915_drm.h1728 __u32 plane_id; member
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_trace.h226 __field(uint32_t, plane_id)
255 __entry->plane_id = state->plane->base.id;
290 __entry->plane_id, __entry->plane_type, __entry->plane_state,
A Damdgpu_dm.c4052 struct amdgpu_mode_info *mode_info, int plane_id, in initialize_plane() argument
4073 possible_crtcs = 1 << plane_id; in initialize_plane()
4074 if (plane_id >= dm->dc->caps.max_streams) in initialize_plane()
4086 mode_info->planes[plane_id] = plane; in initialize_plane()
/linux/drivers/gpu/drm/
A Ddrm_plane.c694 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); in drm_mode_getplane()
714 plane_resp->plane_id = plane->base.id; in drm_mode_getplane()
974 plane = drm_plane_find(dev, file_priv, plane_req->plane_id); in drm_mode_setplane()
977 plane_req->plane_id); in drm_mode_setplane()
/linux/tools/include/uapi/drm/
A Di915_drm.h1728 __u32 plane_id; member
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer.c733 int plane_id) in power_on_plane() argument
741 hws->funcs.dpp_pg_control(hws, plane_id, true); in power_on_plane()
744 hws->funcs.hubp_pg_control(hws, plane_id, true); in power_on_plane()
749 "Un-gated front end for pipe %d\n", plane_id); in power_on_plane()

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