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Searched refs:pll_info (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/clk/ingenic/
A Dcgu.c95 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0); in ingenic_pll_recalc_rate()
96 m += pll_info->m_offset; in ingenic_pll_recalc_rate()
97 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0); in ingenic_pll_recalc_rate()
98 n += pll_info->n_offset; in ingenic_pll_recalc_rate()
155 (*pll_info->calc_m_n_od)(pll_info, rate, parent_rate, &m, &n, &od); in ingenic_pll_calc()
212 ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift); in ingenic_pll_set_rate()
213 ctl |= (m - pll_info->m_offset) << pll_info->m_shift; in ingenic_pll_set_rate()
215 ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift); in ingenic_pll_set_rate()
216 ctl |= (n - pll_info->n_offset) << pll_info->n_shift; in ingenic_pll_set_rate()
218 ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift); in ingenic_pll_set_rate()
[all …]
A Djz4760-cgu.c57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in jz4760_cgu_calc_m_n_od() argument
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 2; in jz4760_cgu_calc_m_n_od()
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
A Dcgu.h58 void (*calc_m_n_od)(const struct ingenic_cgu_pll_info *pll_info,
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_audio.c763 const struct audio_pll_info *pll_info, in get_azalia_clock_info_dp() argument
778 pll_info->dp_dto_source_clock_in_khz * 10; in get_azalia_clock_info_dp()
785 const struct audio_pll_info *pll_info) in dce_aud_wall_dto_setup() argument
821 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce_aud_wall_dto_setup()
843 pll_info, in dce_aud_wall_dto_setup()
877 const struct audio_pll_info *pll_info) in dce60_aud_wall_dto_setup() argument
913 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce60_aud_wall_dto_setup()
935 pll_info, in dce60_aud_wall_dto_setup()
A Ddce_clock_source.c1389 calc_pll_cs->ref_freq_khz = fw_info->pll_info.crystal_frequency; in calc_pll_max_vco_construct()
1391 fw_info->pll_info.min_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1393 fw_info->pll_info.max_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1400 fw_info->pll_info.max_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1407 fw_info->pll_info.min_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1516 clk_src->ref_freq_khz = clk_src->bios->fw_info.pll_info.crystal_frequency; in dce110_clk_src_construct()
A Ddce_audio.h176 const struct audio_pll_info *pll_info);
A Ddce_i2c_hw.c628 dce_i2c_hw->reference_frequency = (ctx->dc_bios->fw_info.pll_info.crystal_frequency) >> 1; in dce_i2c_hw_construct()
/linux/drivers/clk/baikal-t1/
A Dclk-ccu-pll.c43 #define CCU_PLL_NUM ARRAY_SIZE(pll_info)
62 static const struct ccu_pll_info pll_info[] = { variable
148 const struct ccu_pll_info *info = &pll_info[idx]; in ccu_pll_clk_register()
/linux/drivers/gpu/drm/radeon/
A Dradeon_combios.c732 uint16_t pll_info; in radeon_combios_get_clock_info() local
741 if (pll_info) { in radeon_combios_get_clock_info()
742 rev = RBIOS8(pll_info); in radeon_combios_get_clock_info()
764 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
765 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
768 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
769 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
779 mpll->pll_out_min = RBIOS32(pll_info + 0x2a); in radeon_combios_get_clock_info()
792 sclk = RBIOS16(pll_info + 0xa); in radeon_combios_get_clock_info()
793 mclk = RBIOS16(pll_info + 0x8); in radeon_combios_get_clock_info()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/bios/
A Dbios_parser.c437 info->pll_info.crystal_frequency = in get_firmware_info_v1_4()
439 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
441 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
443 info->pll_info.min_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
445 info->pll_info.max_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
488 info->pll_info.crystal_frequency = in get_firmware_info_v2_1()
490 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
492 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
574 info->pll_info.crystal_frequency = in get_firmware_info_v2_2()
576 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v2_2()
[all …]
A Dbios_parser2.c1477 info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10; in get_firmware_info_v3_1()
1480 if (info->pll_info.crystal_frequency == 0) in get_firmware_info_v3_1()
1481 info->pll_info.crystal_frequency = 27000; in get_firmware_info_v3_1()
1552 info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10; in get_firmware_info_v3_2()
1554 if (info->pll_info.crystal_frequency == 0) { in get_firmware_info_v3_2()
1556 info->pll_info.crystal_frequency = 27000; in get_firmware_info_v3_2()
1558 info->pll_info.crystal_frequency = 100000; in get_firmware_info_v3_2()
1620 info->pll_info.crystal_frequency = dce_info_v4_4->dce_refclk_10khz * 10; in get_firmware_info_v3_4()
1637 info->pll_info.crystal_frequency = dce_info_v4_1->dce_refclk_10khz * 10; in get_firmware_info_v3_4()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Daudio.h51 const struct audio_pll_info *pll_info);
/linux/drivers/gpu/drm/amd/display/include/
A Daudio_types.h99 struct audio_pll_info pll_info; member
A Dgrph_object_ctrl_defs.h159 struct pll_info { struct
165 } pll_info; member
/linux/drivers/video/fbdev/aty/
A Datyfb.h47 struct pll_info { struct
138 struct pll_info pll_limits;
A Dradeonfb.h138 struct pll_info { struct
342 struct pll_info pll;
/linux/drivers/gpu/drm/rcar-du/
A Drcar_lvds.c123 struct pll_info { struct
133 unsigned long target, struct pll_info *pll, in rcar_lvds_d3_e3_pll_calc() argument
266 struct pll_info pll = { .diff = (unsigned long)-1 }; in __rcar_lvds_pll_setup_d3_e3()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_hw_sequencer.c1399 audio_output->pll_info.dp_dto_source_clock_in_khz =
1404 audio_output->pll_info.feed_back_divider =
1407 audio_output->pll_info.dto_source =
1412 audio_output->pll_info.ss_enabled = true;
1414 audio_output->pll_info.ss_percentage =
2253 &audio_output.pll_info);
2259 &audio_output.pll_info);
2265 &audio_output.pll_info);
2294 &audio_output.pll_info);
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_hwseq.c154 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn31_init_hw()
160 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn31_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_hwseq.c248 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn201_init_hw()
253 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn201_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hwseq.c493 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn30_init_hw()
499 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn30_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer.c1420 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn10_init_hw()
1426 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn10_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_resource.c253 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dc_create_resource_pool()

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