| /linux/drivers/media/v4l2-core/ |
| A D | v4l2-dv-timings.c | 254 t1->bt.polarities == t2->bt.polarities && in v4l2_match_dv_timings()
305 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
309 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
472 u32 polarities, in v4l2_detect_cvt() argument
485 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_cvt()
487 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_cvt()
607 fmt->bt.polarities = polarities; in v4l2_detect_cvt()
689 u32 polarities, in v4l2_detect_gtf() argument
703 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_gtf()
705 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_gtf()
[all …]
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| /linux/drivers/gpu/drm/arm/ |
| A D | hdlcd_crtc.c | 133 unsigned int polarities, err; in hdlcd_crtc_mode_set_nofb() local
142 polarities = HDLCD_POLARITY_DATAEN | HDLCD_POLARITY_DATA; in hdlcd_crtc_mode_set_nofb()
145 polarities |= HDLCD_POLARITY_HSYNC; in hdlcd_crtc_mode_set_nofb()
147 polarities |= HDLCD_POLARITY_VSYNC; in hdlcd_crtc_mode_set_nofb()
161 hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities); in hdlcd_crtc_mode_set_nofb()
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| /linux/drivers/media/i2c/ |
| A D | st-mipid02.c | 412 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_clk_lane() local
419 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
425 bool are_lanes_swap, bool *polarities) in mipid02_configure_data0_lane() argument
427 bool are_pin_swap = are_lanes_swap ? polarities[2] : polarities[1]; in mipid02_configure_data0_lane()
444 bool are_lanes_swap, bool *polarities) in mipid02_configure_data1_lane() argument
446 bool are_pin_swap = are_lanes_swap ? polarities[1] : polarities[2]; in mipid02_configure_data1_lane()
462 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_from_rx() local
471 polarities); in mipid02_configure_from_rx()
476 polarities); in mipid02_configure_from_rx()
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| A D | ths8200.c | 336 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) { in ths8200_setup()
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
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| A D | ths7303.c | 300 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
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| A D | ov5640.c | 2010 u8 polarities = 0; in ov5640_set_power_dvp() local
2080 polarities |= BIT(1); in ov5640_set_power_dvp()
2082 polarities |= BIT(0); in ov5640_set_power_dvp()
2085 polarities |= BIT(5); in ov5640_set_power_dvp()
2087 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities); in ov5640_set_power_dvp()
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| A D | adv7511-v4l2.c | 1043 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) | in adv7511_s_dv_timings()
1044 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20)); in adv7511_s_dv_timings()
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| A D | tda1997x.c | 1152 timings->bt.polarities = vsync_pos ? V4L2_DV_VSYNC_POS_POL : 0; in tda1997x_detect_std()
1153 timings->bt.polarities |= hsync_pos ? V4L2_DV_HSYNC_POS_POL : 0; in tda1997x_detect_std()
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| A D | adv7842.c | 1583 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv7842_query_dv_timings()
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| A D | adv7604.c | 1615 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv76xx_query_dv_timings()
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| /linux/include/media/ |
| A D | v4l2-dv-timings.h | 156 unsigned active_width, u32 polarities, bool interlaced,
180 u32 polarities, bool interlaced, struct v4l2_fract aspect,
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| A D | ti,sn65dsi86.yaml | 137 lane-polarities:
147 lane-polarities: [data-lanes]
271 lane-polarities = <0 1 0 1>;
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| /linux/Documentation/devicetree/bindings/media/ |
| A D | renesas,vin.yaml | 87 If both HSYNC and VSYNC polarities are not specified, embedded
93 If both HSYNC and VSYNC polarities are not specified, embedded
136 If both HSYNC and VSYNC polarities are not specified, embedded
142 If both HSYNC and VSYNC polarities are not specified, embedded
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| A D | video-interfaces.yaml | 124 that if HSYNC and VSYNC polarities are not specified, embedded
196 lane-polarities:
203 An array of polarities of the lanes starting from the clock lane and
207 lane-polarities property is omitted, the value must be interpreted as 0
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| A D | ti,omap3isp.txt | 48 lane-polarities : lane polarity (required on CSI-2)
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| /linux/arch/arm64/boot/dts/qcom/ |
| A D | sc7180-trogdor-lazor-r0.dts | 34 lane-polarities = <1 0>;
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| /linux/arch/arm/boot/dts/ |
| A D | omap3-n9.dts | 56 lane-polarities = <1 1 1>;
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| A D | omap3-n950.dts | 102 lane-polarities = <1 1 1>;
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| /linux/Documentation/userspace-api/media/v4l/ |
| A D | dv-timings.rst | 20 width and height, signal polarities, frontporches, backporches, sync
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| A D | vidioc-g-dv-timings.rst | 108 - ``polarities``
109 - This is a bit mask that defines polarities of sync signals. bit 0
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| A D | st,st-mipid02.txt | 40 - lane-polarities: any lane can be inverted or not.
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| /linux/drivers/media/platform/ |
| A D | aspeed-video.c | 706 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
710 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
716 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
720 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
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| /linux/drivers/media/i2c/adv748x/ |
| A D | adv748x-hdmi.c | 317 bt->polarities = (polarity & BIT(4) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv748x_hdmi_query_dv_timings()
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| /linux/drivers/media/test-drivers/vivid/ |
| A D | vivid-vid-cap.c | 1694 bt->polarities, bt->interlaced, timings)) in valid_cvt_gtf_timings()
1705 bt->polarities, bt->interlaced, in valid_cvt_gtf_timings()
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| /linux/include/uapi/linux/ |
| A D | videodev2.h | 1461 __u32 polarities; member
|