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Searched refs:pstate_table (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Daldebaran_ppt.c500 &smu->pstate_table; in aldebaran_populate_umd_state_clk()
520 pstate_table->gfxclk_pstate.standard = in aldebaran_populate_umd_state_clk()
522 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk()
528 pstate_table->gfxclk_pstate.min; in aldebaran_populate_umd_state_clk()
529 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk()
530 pstate_table->uclk_pstate.min; in aldebaran_populate_umd_state_clk()
532 pstate_table->socclk_pstate.min; in aldebaran_populate_umd_state_clk()
727 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_print_clk_levels() local
1273 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_set_performance_level() local
1307 struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; in aldebaran_set_soft_freq_limited_range() local
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A Dsmu_v13_0.c1642 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_set_performance_level() local
1643 &smu->pstate_table; in smu_v13_0_set_performance_level()
1675 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v13_0_set_performance_level()
1678 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v13_0_set_performance_level()
1682 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v13_0_set_performance_level()
1704 pstate_table->gfxclk_pstate.curr.min = sclk_min; in smu_v13_0_set_performance_level()
1705 pstate_table->gfxclk_pstate.curr.max = sclk_max; in smu_v13_0_set_performance_level()
1716 pstate_table->uclk_pstate.curr.min = mclk_min; in smu_v13_0_set_performance_level()
1717 pstate_table->uclk_pstate.curr.max = mclk_max; in smu_v13_0_set_performance_level()
1728 pstate_table->socclk_pstate.curr.min = socclk_min; in smu_v13_0_set_performance_level()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Darcturus_ppt.c551 struct smu_umd_pstate_table *pstate_table = in arcturus_populate_umd_state_clk() local
552 &smu->pstate_table; in arcturus_populate_umd_state_clk()
566 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
568 pstate_table->uclk_pstate.standard = in arcturus_populate_umd_state_clk()
570 pstate_table->socclk_pstate.standard = in arcturus_populate_umd_state_clk()
573 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
574 pstate_table->gfxclk_pstate.min; in arcturus_populate_umd_state_clk()
575 pstate_table->uclk_pstate.standard = in arcturus_populate_umd_state_clk()
576 pstate_table->uclk_pstate.min; in arcturus_populate_umd_state_clk()
577 pstate_table->socclk_pstate.standard = in arcturus_populate_umd_state_clk()
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A Dnavi10_ppt.c1509 struct smu_umd_pstate_table *pstate_table = in navi10_populate_umd_state_clk() local
1510 &smu->pstate_table; in navi10_populate_umd_state_clk()
1572 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1574 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()
1576 pstate_table->socclk_pstate.standard = in navi10_populate_umd_state_clk()
1579 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1580 pstate_table->gfxclk_pstate.min; in navi10_populate_umd_state_clk()
1581 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()
1582 pstate_table->uclk_pstate.min; in navi10_populate_umd_state_clk()
1583 pstate_table->socclk_pstate.standard = in navi10_populate_umd_state_clk()
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A Dsmu_v11_0.c1890 struct smu_umd_pstate_table *pstate_table = in smu_v11_0_set_performance_level() local
1891 &smu->pstate_table; in smu_v11_0_set_performance_level()
1918 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v11_0_set_performance_level()
1919 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v11_0_set_performance_level()
1920 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v11_0_set_performance_level()
1923 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v11_0_set_performance_level()
1926 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v11_0_set_performance_level()
1929 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v11_0_set_performance_level()
1930 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v11_0_set_performance_level()
1931 socclk_min = socclk_max = pstate_table->socclk_pstate.peak; in smu_v11_0_set_performance_level()
A Dsienna_cichlid_ppt.c1232 struct smu_umd_pstate_table *pstate_table = in sienna_cichlid_populate_umd_state_clk() local
1233 &smu->pstate_table; in sienna_cichlid_populate_umd_state_clk()
1235 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()
1236 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
1238 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
1240 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk()
1241 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()
1243 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK; in sienna_cichlid_populate_umd_state_clk()
1245 pstate_table->socclk_pstate.min = soc_table->min; in sienna_cichlid_populate_umd_state_clk()
1246 pstate_table->socclk_pstate.peak = soc_table->max; in sienna_cichlid_populate_umd_state_clk()
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/linux/drivers/gpu/drm/amd/pm/swsmu/
A Damdgpu_smu.c2471 struct smu_umd_pstate_table *pstate_table = in smu_read_sensor() local
2472 &smu->pstate_table; in smu_read_sensor()
2493 *((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100; in smu_read_sensor()
2497 *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100; in smu_read_sensor()
/linux/drivers/gpu/drm/amd/pm/inc/
A Damdgpu_smu.h503 struct smu_umd_pstate_table pstate_table; member

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