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Searched refs:qos_level_high_wm (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer_debug.c158 …(s->qos_level_high_wm * frac) / ref_clk_mhz / frac, (s->qos_level_high_wm * frac) / ref_clk_mhz % … in dcn10_get_hubp_states()
178 …(s->qos_level_high_wm * frac) / ref_clk_mhz / frac, (s->qos_level_high_wm * frac) / ref_clk_mhz % … in dcn10_get_hubp_states()
311 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
A Ddcn10_hubp.c653 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp1_program_deadline()
992 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp1_read_state_common()
1056 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp1_read_state_common()
A Ddcn10_hubp.h684 uint32_t qos_level_high_wm; member
A Ddcn10_hw_sequencer.c194 DTN_INFO_MICRO_SEC(s->qos_level_high_wm); in dcn10_log_hubp_states()
266 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hubp.c146 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp2_program_deadline()
1179 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp2_read_state_common()
1243 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp2_read_state_common()
1518 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
1523 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp2_validate_dml_output()
1525 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_hubp.c478 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
483 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp21_validate_dml_output()
485 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_rq_dlg_helpers.c340 ttu_regs->qos_level_high_wm); in print__ttu_regs_st()
A Ddisplay_mode_structs.h499 unsigned int qos_level_high_wm; member
A Ddml1_display_rq_dlg_calc.c1915 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml1_rq_dlg_get_dlg_params()
1917 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml1_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c1638 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml_rq_dlg_get_dlg_params()
1640 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c1812 disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)htotal in dml_rq_dlg_get_dlg_params()
1814 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c1658 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1659 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c1530 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c1531 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20v2_rq_dlg_get_dlg_params()

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