Searched refs:ref_and_mask_cp0 (Results 1 – 8 of 8) sorted by relevance
30 u32 ref_and_mask_cp0; member
317 .ref_and_mask_cp0 = BIF_BX_PF_GPU_HDP_FLUSH_DONE__CP0_MASK,332 .ref_and_mask_cp0 = BIF_BX_PF_GPU_HDP_FLUSH_DONE__CP0_MASK,
328 .ref_and_mask_cp0 = GPU_HDP_FLUSH_DONE__CP0_MASK,343 .ref_and_mask_cp0 = GPU_HDP_FLUSH_DONE__CP0_MASK,
260 .ref_and_mask_cp0 = GPU_HDP_FLUSH_DONE__CP0_MASK,
338 .ref_and_mask_cp0 = BIF_BX_PF0_GPU_HDP_FLUSH_DONE__CP0_MASK,
249 .ref_and_mask_cp0 = BIF_BX_PF0_GPU_HDP_FLUSH_DONE__CP0_MASK,
5366 ref_and_mask = nbio_hf_reg->ref_and_mask_cp0; in gfx_v9_0_ring_emit_hdp_flush()
8570 ref_and_mask = nbio_hf_reg->ref_and_mask_cp0; in gfx_v10_0_ring_emit_hdp_flush()
Completed in 41 milliseconds