Searched refs:ref_clks (Results 1 – 5 of 5) sorted by relevance
898 refclk = dev_priv->dpll.ref_clks.nssc; in hsw_ddi_wrpll_get_freq()908 refclk = dev_priv->dpll.ref_clks.ssc; in hsw_ddi_wrpll_get_freq()1056 i915->dpll.ref_clks.ssc = 135000; in hsw_update_dpll_ref_clks()1059 i915->dpll.ref_clks.nssc = 24000; in hsw_update_dpll_ref_clks()1061 i915->dpll.ref_clks.nssc = 135000; in hsw_update_dpll_ref_clks()1552 i915->dpll.ref_clks.nssc, in skl_ddi_hdmi_pll_dividers()2269 i915->dpll.ref_clks.ssc = 100000; in bxt_update_dpll_ref_clks()2270 i915->dpll.ref_clks.nssc = 100000; in bxt_update_dpll_ref_clks()2412 i915->dpll.ref_clks.nssc == 38400; in ehl_combo_pll_div_frac_wa_needed()2506 dev_priv->dpll.ref_clks.nssc == 24000 ? in icl_calc_dp_combo_pll()[all …]
1096 dev_priv->dpll.ref_clks.nssc, in i915_shared_dplls_info()1097 dev_priv->dpll.ref_clks.ssc); in i915_shared_dplls_info()
61 static const struct pic32_ref_osc_data ref_clks[] = { variable217 clks[nr_clks] = pic32_refo_clk_register(&ref_clks[i], core); in pic32mzda_clk_probe()
1038 } ref_clks; member
510 refclk = vgpu->gvt->gt->i915->dpll.ref_clks.ssc; in bdw_vgpu_get_dp_bitrate()541 int refclk = vgpu->gvt->gt->i915->dpll.ref_clks.nssc; in bxt_vgpu_get_dp_bitrate()
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