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Searched refs:refclk (Results 1 – 25 of 193) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dpllgt215.c42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
50 N = tmp / info->refclk; in gt215_pll_calc()
51 fN = tmp % info->refclk; in gt215_pll_calc()
54 if (fN >= info->refclk / 2) in gt215_pll_calc()
57 if (fN < info->refclk / 2) in gt215_pll_calc()
59 fN = tmp - (N * info->refclk); in gt215_pll_calc()
67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc()
75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc()
86 return info->refclk * *pN / *pM / *P; in gt215_pll_calc()
/linux/drivers/gpu/drm/i915/display/
A Dintel_cdclk.c1215 { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
1216 { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
1217 { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 },
1218 { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 },
1219 { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 },
1224 { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 },
1225 { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 },
1329 for (i = 0; table[i].refclk; i++) in bxt_calc_cdclk()
1330 if (table[i].refclk == dev_priv->cdclk.hw.ref && in bxt_calc_cdclk()
1348 for (i = 0; table[i].refclk; i++) in bxt_calc_cdclk_pll_vco()
[all …]
A Dintel_dpll.c766 int refclk = 100000; in bxt_find_best_dpll() local
1082 int refclk = 120000; in ilk_crtc_compute_clock() local
1172 int refclk = 100000; in chv_crtc_compute_clock() local
1217 int refclk = 96000; in g4x_crtc_compute_clock() local
1227 refclk); in g4x_crtc_compute_clock()
1263 int refclk = 96000; in pnv_crtc_compute_clock() local
1273 refclk); in pnv_crtc_compute_clock()
1300 int refclk = 96000; in i9xx_crtc_compute_clock() local
1310 refclk); in i9xx_crtc_compute_clock()
1337 int refclk = 48000; in i8xx_crtc_compute_clock() local
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A Dintel_dpll.h18 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
19 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
20 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
37 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
/linux/drivers/phy/ti/
A Dphy-dm816x-usb.c56 struct clk *refclk; member
86 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
133 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend()
144 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume()
161 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume()
236 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe()
237 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe()
238 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe()
239 error = clk_prepare(phy->refclk); in dm816x_usb_phy_probe()
265 clk_unprepare(phy->refclk); in dm816x_usb_phy_probe()
[all …]
A Dphy-ti-pipe3.c171 struct clk *refclk; member
608 if (IS_ERR(phy->refclk)) { in ti_pipe3_get_clk()
614 return PTR_ERR(phy->refclk); in ti_pipe3_get_clk()
825 if (!IS_ERR(phy->refclk)) { in ti_pipe3_probe()
826 clk_prepare_enable(phy->refclk); in ti_pipe3_probe()
848 clk_disable_unprepare(phy->refclk); in ti_pipe3_remove()
860 if (!IS_ERR(phy->refclk)) { in ti_pipe3_enable_clocks()
891 if (!IS_ERR(phy->refclk)) in ti_pipe3_enable_clocks()
892 clk_disable_unprepare(phy->refclk); in ti_pipe3_enable_clocks()
901 if (!IS_ERR(phy->refclk)) in ti_pipe3_disable_clocks()
[all …]
/linux/drivers/phy/xilinx/
A Dphy-zynqmp.c200 unsigned int refclk; member
769 unsigned int refclk; in xpsgtr_xlate() local
798 refclk = args->args[3]; in xpsgtr_xlate()
800 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate()
805 gtr_phy->refclk = refclk; in xpsgtr_xlate()
889 unsigned int refclk; in xpsgtr_get_ref_clocks() local
892 for (refclk = 0; refclk < ARRAY_SIZE(gtr_dev->refclk_sscs); ++refclk) { in xpsgtr_get_ref_clocks()
903 refclk); in xpsgtr_get_ref_clocks()
914 gtr_dev->clk[refclk] = clk; in xpsgtr_get_ref_clocks()
932 rate, refclk); in xpsgtr_get_ref_clocks()
[all …]
/linux/drivers/net/ethernet/arc/
A Demac_rockchip.c32 struct clk *refclk; member
147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe()
148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe()
150 PTR_ERR(priv->refclk)); in emac_rockchip_probe()
151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe()
155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe()
195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe()
241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe()
255 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
/linux/drivers/gpu/drm/gma500/
A Dgma_display.h44 int target, int refclk,
49 void (*clock)(int refclk, struct gma_clock_t *clock);
50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
91 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
92 extern void gma_clock(int refclk, struct gma_clock_t *clock);
97 struct drm_crtc *crtc, int target, int refclk,
A Dcdv_intel_display.c364 int refclk) in cdv_intel_limit() argument
372 if (refclk == 96000) in cdv_intel_limit()
378 if (refclk == 27000) in cdv_intel_limit()
383 if (refclk == 27000) in cdv_intel_limit()
402 int refclk, in cdv_intel_find_dp_pll() argument
410 switch (refclk) { in cdv_intel_find_dp_pll()
581 int refclk; in cdv_intel_crtc_mode_set() local
623 refclk = 96000; in cdv_intel_crtc_mode_set()
626 refclk = 27000; in cdv_intel_crtc_mode_set()
637 refclk = 27000; in cdv_intel_crtc_mode_set()
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A Doaktrail_crtc.c38 int refclk, struct gma_clock_t *best_clock);
42 int refclk, struct gma_clock_t *best_clock);
81 int refclk) in mrst_limit() argument
113 clock->dot = (refclk * clock->m) / (14 * clock->p1); in mrst_lvds_clock()
125 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() argument
150 actual_freq = (refclk * clock.m) / in mrst_sdvo_find_best_pll()
183 int refclk, struct gma_clock_t *best_clock) in mrst_lvds_find_best_pll() argument
196 mrst_lvds_clock(refclk, &clock); in mrst_lvds_find_best_pll()
367 int refclk = 0; in oaktrail_crtc_mode_set() local
502 limit = mrst_limit(crtc, refclk); in oaktrail_crtc_mode_set()
[all …]
/linux/drivers/net/phy/
A Dsmsc.c48 struct clk *refclk; member
298 clk_disable_unprepare(priv->refclk); in smsc_phy_remove()
299 clk_put(priv->refclk); in smsc_phy_remove()
321 priv->refclk = clk_get_optional(dev, NULL); in smsc_phy_probe()
322 if (IS_ERR(priv->refclk)) in smsc_phy_probe()
323 return dev_err_probe(dev, PTR_ERR(priv->refclk), in smsc_phy_probe()
326 ret = clk_prepare_enable(priv->refclk); in smsc_phy_probe()
330 ret = clk_set_rate(priv->refclk, 50 * 1000 * 1000); in smsc_phy_probe()
332 clk_disable_unprepare(priv->refclk); in smsc_phy_probe()
/linux/Documentation/devicetree/bindings/usb/
A Docteon-usb.txt24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
54 cavium,refclk-type = "crystal";
A Ddwc3-cavium.txt18 refclk-frequency = <0x05f5e100>;
19 refclk-type-ss = "dlmc_ref_clk0";
20 refclk-type-hs = "dlmc_ref_clk0";
A Dsmsc,usb3503.yaml61 const: refclk
63 refclk-frequency:
90 clock-names = "refclk";
105 refclk-frequency = <19200000>;
/linux/Documentation/devicetree/bindings/mips/cavium/
A Ductl.txt16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
30 refclk-frequency = <24000000>;
32 refclk-type = "crystal";
/linux/sound/soc/meson/
A Daxg-spdifin.c55 struct clk *refclk; member
121 ret = clk_prepare_enable(priv->refclk); in axg_spdifin_startup()
140 clk_disable_unprepare(priv->refclk); in axg_spdifin_shutdown()
193 ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); in axg_spdifin_sample_mode_config()
203 rate = clk_get_rate(priv->refclk); in axg_spdifin_sample_mode_config()
489 priv->refclk = devm_clk_get(dev, "refclk"); in axg_spdifin_probe()
490 if (IS_ERR(priv->refclk)) { in axg_spdifin_probe()
491 ret = PTR_ERR(priv->refclk); in axg_spdifin_probe()
/linux/drivers/spi/
A Dspi-zynq-qspi.c136 struct clk *refclk; member
348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op()
386 clk_enable(qspi->refclk); in zynq_qspi_setup_op()
659 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe()
660 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe()
662 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe()
672 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe()
707 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe()
722 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe()
747 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_remove()
/linux/arch/arm/boot/dts/
A Dberlin2cd.dtsi51 refclk: oscillator { label
389 clocks = <&refclk>;
446 clocks = <&refclk>;
453 clocks = <&refclk>;
461 clocks = <&refclk>;
486 clocks = <&refclk>;
497 clocks = <&refclk>;
507 clocks = <&refclk>;
532 clocks = <&refclk>;
544 clocks = <&refclk>;
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A Dkeystone-k2hk-evm.dts59 clock-output-names = "refclk-sys";
66 clock-output-names = "refclk-pass";
73 clock-output-names = "refclk-arm";
80 clock-output-names = "refclk-ddr3a";
87 clock-output-names = "refclk-ddr3b";
/linux/drivers/net/ethernet/ti/
A Dcpts.c571 clk_enable(cpts->refclk); in cpts_register()
590 clk_disable(cpts->refclk); in cpts_register()
610 clk_disable(cpts->refclk); in cpts_unregister()
619 freq = clk_get_rate(cpts->refclk); in cpts_calc_mult_shift()
771 if (IS_ERR(cpts->refclk)) in cpts_create()
775 if (IS_ERR(cpts->refclk)) { in cpts_create()
777 PTR_ERR(cpts->refclk)); in cpts_create()
778 return ERR_CAST(cpts->refclk); in cpts_create()
781 ret = clk_prepare(cpts->refclk); in cpts_create()
808 if (WARN_ON(!cpts->refclk)) in cpts_release()
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/linux/Documentation/devicetree/bindings/phy/
A Dti,phy-j721e-wiz.yaml80 refclk-dig:
109 "^pll[0|1]-refclk$":
192 pll0-refclk {
199 pll1-refclk {
206 cmn-refclk-dig-div {
216 refclk-dig {
/linux/drivers/phy/
A Dphy-pistachio-usb.c38 unsigned int refclk; member
68 p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); in pistachio_usb_phy_power_on()
71 if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { in pistachio_usb_phy_power_on()
161 &p_phy->refclk); in pistachio_usb_phy_probe()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
A Dpll.c327 info->refclk = nvbios_rd32(bios, data + 31); in nvbios_pll_parse()
350 info->refclk = nvbios_rd32(bios, data + 28); in nvbios_pll_parse()
353 info->refclk = nvbios_rd16(bios, data + 9) * 1000; in nvbios_pll_parse()
368 info->refclk = nvbios_rd16(bios, data + 1) * 1000; in nvbios_pll_parse()
386 if (!info->refclk) { in nvbios_pll_parse()
387 info->refclk = device->crystal; in nvbios_pll_parse()
393 info->refclk = 200000; in nvbios_pll_parse()
395 info->refclk = 25000; in nvbios_pll_parse()
/linux/Documentation/devicetree/bindings/clock/
A Dmarvell,berlin.txt18 "refclk" for the SoCs oscillator input on all SoCs,
29 clocks = <&refclk>;
30 clock-names = "refclk";

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