Searched refs:refcyc_per_meta_chunk_vblank_l (Results 1 – 14 of 14) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_hubp.c | 422 REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr.refcyc_per_meta_chunk_vblank_l); in hubp21_validate_dml_output()
468 if (dlg_attr.refcyc_per_meta_chunk_vblank_l != dml_dlg_attr->refcyc_per_meta_chunk_vblank_l) in hubp21_validate_dml_output()
470 dml_dlg_attr->refcyc_per_meta_chunk_vblank_l, dlg_attr.refcyc_per_meta_chunk_vblank_l); in hubp21_validate_dml_output()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hubp.c | 268 REFCYC_PER_META_CHUNK_VBLANK_L, dlg_attr->refcyc_per_meta_chunk_vblank_l); in hubp2_setup_interdependent()
1125 REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr->refcyc_per_meta_chunk_vblank_l); in hubp2_read_state_common()
1462 REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr.refcyc_per_meta_chunk_vblank_l); in hubp2_validate_dml_output()
1508 if (dlg_attr.refcyc_per_meta_chunk_vblank_l != dml_dlg_attr->refcyc_per_meta_chunk_vblank_l) in hubp2_validate_dml_output()
1510 dml_dlg_attr->refcyc_per_meta_chunk_vblank_l, dlg_attr.refcyc_per_meta_chunk_vblank_l); in hubp2_validate_dml_output()
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| A D | dcn20_hwseq.c | 1363 old_dlg_attr.refcyc_per_meta_chunk_vblank_l != new_dlg_attr->refcyc_per_meta_chunk_vblank_l || in dcn20_detect_pipe_changes()
1381 old_dlg_attr.refcyc_per_meta_chunk_vblank_l = new_dlg_attr->refcyc_per_meta_chunk_vblank_l; in dcn20_detect_pipe_changes()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 1506 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml_rq_dlg_get_dlg_params()
1510 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = 0; in dml_rq_dlg_get_dlg_params()
1511 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1514 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assig… in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_rq_dlg_helpers.c | 248 dlg_regs->refcyc_per_meta_chunk_vblank_l); in print__dlg_regs_st()
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| A D | display_mode_structs.h | 461 unsigned int refcyc_per_meta_chunk_vblank_l; member
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| A D | dml1_display_rq_dlg_calc.c | 1544 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml1_rq_dlg_get_dlg_params()
1547 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1550 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l;/* dcc for 4:2:0 is not supported in dcn1.0. assign… in dml1_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 1422 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml20_rq_dlg_get_dlg_params()
1425 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int) dml_pow(2, 13)); in dml20_rq_dlg_get_dlg_params()
1428 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assig… in dml20_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_calc_20v2.c | 1423 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml20v2_rq_dlg_get_dlg_params()
1426 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int) dml_pow(2, 13)); in dml20v2_rq_dlg_get_dlg_params()
1429 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assig… in dml20v2_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 1684 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = in dml_rq_dlg_get_dlg_params()
1687 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1690 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assig… in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 1559 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = (unsigned int) (dst_y_per_row_vblank * (double) ht… in dml_rq_dlg_get_dlg_params()
1560 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1562 …disp_dlg_regs->refcyc_per_meta_chunk_vblank_c = disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // … in dml_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hubp.c | 708 REFCYC_PER_META_CHUNK_VBLANK_L, dlg_attr->refcyc_per_meta_chunk_vblank_l); in hubp1_setup_interdependent()
938 REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr->refcyc_per_meta_chunk_vblank_l); in hubp1_read_state_common()
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| A D | dcn10_hw_sequencer_debug.c | 265 dlg_regs->refcyc_per_pte_group_vblank_c, dlg_regs->refcyc_per_meta_chunk_vblank_l, in dcn10_get_dlg_states()
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| A D | dcn10_hw_sequencer.c | 241 dlg_regs->refcyc_per_pte_group_vblank_c, dlg_regs->refcyc_per_meta_chunk_vblank_l, in dcn10_log_hubp_states()
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