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Searched refs:reg_block (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dppatomctrl.c49 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_retrieve_ac_timing() argument
55 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing()
102 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_set_mc_reg_address_table() argument
138 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table() local
156 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table()
158 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table()
163 reg_block, table); in atomctrl_initialize_mc_reg_table()
175 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table_v2_2() local
193 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table_v2_2()
195 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table_v2_2()
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/linux/drivers/gpu/drm/amd/amdgpu/
A Ddce_v8_0.c2874 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local
2883 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2886 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2889 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2892 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2895 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2898 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2925 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vline_interrupt_state() local
2934 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
2937 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
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A Datom.c192 idx += gctx->reg_block; in atom_get_src_int()
259 val = gctx->reg_block; in atom_get_src_int()
464 idx += gctx->reg_block; in atom_put_dst()
526 gctx->reg_block = val; in atom_put_dst()
916 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
918 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1274 ctx->reg_block = 0; in amdgpu_atom_execute_table()
A Datom.h140 uint16_t reg_block; member
A Ddce_v6_0.c2826 u32 reg_block, interrupt_mask; in dce_v6_0_set_crtc_vblank_interrupt_state() local
2835 reg_block = SI_CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2838 reg_block = SI_CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2841 reg_block = SI_CRTC2_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2844 reg_block = SI_CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2847 reg_block = SI_CRTC4_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2850 reg_block = SI_CRTC5_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2859 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
2861 WREG32(mmINT_MASK + reg_block, interrupt_mask); in dce_v6_0_set_crtc_vblank_interrupt_state()
2864 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
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A Damdgpu_atombios.c1440 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local
1445 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table()
1446 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table()
1447 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table()
1448 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table()
1485 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
/linux/drivers/gpu/drm/radeon/
A Datom.c195 idx += gctx->reg_block; in atom_get_src_int()
262 val = gctx->reg_block; in atom_get_src_int()
467 idx += gctx->reg_block; in atom_put_dst()
529 gctx->reg_block = val; in atom_put_dst()
883 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
885 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1226 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
A Datom.h137 uint16_t reg_block; member
A Dradeon_atombios.c4003 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local
4008 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table()
4009 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table()
4010 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table()
4011 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table()
4048 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
/linux/drivers/net/ethernet/intel/i40e/
A Di40e_common.c945 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local
949 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg()
953 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
962 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
1265 u32 reg_block = 0; in i40e_clear_hw() local
1268 reg_block = abs_queue_idx / 128; in i40e_clear_hw()
1272 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw()
1277 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()

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