Home
last modified time | relevance | path

Searched refs:requested_min_ds_dcfclk_khz (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Ddcn301_smu.c171 …01_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) in dcn301_smu_set_min_deep_sleep_dcfclk() argument
175 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_min_ds_dcfclk_khz); in dcn301_smu_set_min_deep_sleep_dcfclk()
180 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn301_smu_set_min_deep_sleep_dcfclk()
A Ddcn301_smu.h154 …1_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz);
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_smu.c190 …31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) in dcn31_smu_set_min_deep_sleep_dcfclk() argument
198 return requested_min_ds_dcfclk_khz; in dcn31_smu_set_min_deep_sleep_dcfclk()
203 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in dcn31_smu_set_min_deep_sleep_dcfclk()
A Ddcn31_smu.h258 …1_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz);
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr_vbios_smu.c175 …os_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) in rn_vbios_smu_set_min_deep_sleep_dcfclk() argument
185 khz_to_mhz_ceil(requested_min_ds_dcfclk_khz)); in rn_vbios_smu_set_min_deep_sleep_dcfclk()
A Drn_clk_mgr_vbios_smu.h33 …s_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz);

Completed in 9 milliseconds