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Searched refs:ring_enc (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Duvd_v7_0.c88 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
122 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_wptr()
160 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_set_wptr()
455 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_sw_init()
576 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_hw_init()
757 adev->uvd.inst[i].ring_enc[0].wptr = 0; in uvd_v7_0_mmsch_start()
758 adev->uvd.inst[i].ring_enc[0].wptr_old = 0; in uvd_v7_0_mmsch_start()
916 ring = &adev->uvd.inst[i].ring_enc[0]; in uvd_v7_0_sriov_start()
1110 ring = &adev->uvd.inst[k].ring_enc[0]; in uvd_v7_0_start()
1117 ring = &adev->uvd.inst[k].ring_enc[1]; in uvd_v7_0_start()
[all …]
A Dvcn_v2_5.c185 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()
272 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()
273 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()
274 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()
288 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()
1074 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()
1083 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()
1244 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_sriov_start()
1424 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v2_5_pause_dpg_mode()
1434 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v2_5_pause_dpg_mode()
[all …]
A Duvd_v6_0.c95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
156 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_set_wptr()
404 adev->uvd.inst->ring_enc[i].funcs = NULL; in uvd_v6_0_sw_init()
425 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_sw_init()
451 amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); in uvd_v6_0_sw_fini()
508 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_hw_init()
862 ring = &adev->uvd.inst->ring_enc[0]; in uvd_v6_0_start()
869 ring = &adev->uvd.inst->ring_enc[1]; in uvd_v6_0_start()
1258 amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); in uvd_v6_0_process_interrupt()
[all …]
A Dvcn_v2_0.c156 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
237 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()
1075 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()
1084 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()
1226 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()
1236 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()
1543 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()
1560 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()
1814 adev->vcn.inst->ring_enc[i].wptr = 0; in vcn_v2_0_start_mmsch()
1815 adev->vcn.inst->ring_enc[i].wptr_old = 0; in vcn_v2_0_start_mmsch()
[all …]
A Dvcn_v1_0.c141 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()
197 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_hw_init()
933 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_start_spg_mode()
940 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_start_spg_mode()
1240 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_pause_dpg_mode()
1247 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_pause_dpg_mode()
1586 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_rptr()
1603 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_wptr()
1620 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_set_wptr()
1729 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v1_0_process_interrupt()
[all …]
A Dvcn_v3_0.c202 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()
307 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
334 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
1244 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()
1253 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()
1376 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()
1616 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()
1626 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()
1977 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()
1994 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { in vcn_v3_0_enc_ring_get_wptr()
[all …]
A Damdgpu_uvd.h46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
A Damdgpu_vcn.h214 struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS]; member
A Damdgpu_vcn.c276 amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_sw_fini()
394 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_idle_work_handler()
454 fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); in amdgpu_vcn_ring_begin_use()
A Damdgpu_uvd.c393 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()
1278 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()
A Djpeg_v1_0.c608 if (amdgpu_fence_wait_empty(&adev->vcn.inst->ring_enc[cnt])) in jpeg_v1_0_ring_begin_use()
A Damdgpu_kms.c480 if (adev->uvd.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()
505 if (adev->vcn.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()

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