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Searched refs:safe_to_lower (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
A Ddcn201_clk_mgr.c79 bool safe_to_lower) in dcn201_update_clocks_vbios() argument
86 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) { in dcn201_update_clocks_vbios()
91 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr->clks.dispclk_khz)) { in dcn201_update_clocks_vbios()
124 bool safe_to_lower) in dcn201_update_clocks() argument
153 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks()
160 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
163 if (should_set_clock(safe_to_lower, in dcn201_update_clocks()
167 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks()
194 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn201_update_clocks()
196 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn201_update_clocks()
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/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_hubbub.c145 bool safe_to_lower) in hubbub21_program_urgent_watermarks() argument
168 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
178 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
213 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
223 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
258 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
268 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
313 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks()
339 bool safe_to_lower) in hubbub21_program_stutter_watermarks() argument
492 bool safe_to_lower) in hubbub21_program_pstate_watermarks() argument
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A Ddcn21_hubbub.h132 bool safe_to_lower);
137 bool safe_to_lower);
142 bool safe_to_lower);
147 bool safe_to_lower);
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_hubbub.c151 bool safe_to_lower) in hubbub31_program_urgent_watermarks() argument
173 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
183 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
217 if (safe_to_lower || watermarks->b.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
227 if (safe_to_lower || watermarks->b.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
261 if (safe_to_lower || watermarks->c.frac_urg_bw_flip in hubbub31_program_urgent_watermarks()
271 if (safe_to_lower || watermarks->c.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
315 if (safe_to_lower || watermarks->d.frac_urg_bw_nom in hubbub31_program_urgent_watermarks()
341 bool safe_to_lower) in hubbub31_program_stutter_watermarks() argument
614 bool safe_to_lower) in hubbub31_program_pstate_watermarks() argument
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c106 struct dc_state *context, bool safe_to_lower) in dcn20_update_clocks_update_dpp_dto() argument
122 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto()
211 bool safe_to_lower) in dcn2_update_clocks() argument
254 if (enter_display_off == safe_to_lower) { in dcn2_update_clocks()
269 if (should_set_clock(safe_to_lower, in dcn2_update_clocks()
322 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn2_update_clocks()
325 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks()
332 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks()
346 bool safe_to_lower) in dcn2_update_clocks_fpga() argument
362 if (should_set_clock(safe_to_lower, in dcn2_update_clocks_fpga()
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A Ddcn20_clk_mgr.h31 bool safe_to_lower);
35 bool safe_to_lower);
37 struct dc_state *context, bool safe_to_lower);
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hubbub.c249 bool safe_to_lower) in hubbub1_program_urgent_watermarks() argument
363 bool safe_to_lower) in hubbub1_program_stutter_watermarks() argument
386 if (safe_to_lower || watermarks->a.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
419 if (safe_to_lower || watermarks->b.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
452 if (safe_to_lower || watermarks->c.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
485 if (safe_to_lower || watermarks->d.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks()
508 bool safe_to_lower) in hubbub1_program_pstate_watermarks() argument
515 if (safe_to_lower || watermarks->a.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
532 if (safe_to_lower || watermarks->b.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
549 if (safe_to_lower || watermarks->c.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks()
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A Ddcn10_hubbub.h373 bool safe_to_lower);
396 bool safe_to_lower);
401 bool safe_to_lower);
406 bool safe_to_lower);
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A Drv1_clk_mgr.c92 bool safe_to_lower) in ramp_up_dispclk_with_dpp() argument
156 if (!safe_to_lower) in ramp_up_dispclk_with_dpp()
192 bool safe_to_lower) in rv1_update_clocks() argument
217 if (enter_display_off == safe_to_lower) { in rv1_update_clocks()
233 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rv1_update_clocks()
242 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks()
248 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
253 if (should_set_clock(safe_to_lower, in rv1_update_clocks()
275 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz) in rv1_update_clocks()
277 ramp_up_dispclk_with_dpp(clk_mgr, dc, new_clocks, safe_to_lower); in rv1_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c245 bool safe_to_lower) in dcn3_update_clocks() argument
278 if (enter_display_off == safe_to_lower) in dcn3_update_clocks()
285 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
290 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_d… in dcn3_update_clocks()
295 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn3_update_clocks()
312 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn3_update_clocks()
322 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks()
331 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn3_update_clocks()
337 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn3_update_clocks()
340 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn3_update_clocks()
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr_internal.h317 static inline bool should_set_clock(bool safe_to_lower, int calc_clk, int cur_clk) in should_set_clock() argument
319 return ((safe_to_lower && calc_clk < cur_clk) || calc_clk > cur_clk); in should_set_clock()
322 static inline bool should_update_pstate_support(bool safe_to_lower, bool calc_support, bool cur_sup… in should_update_pstate_support() argument
325 if (calc_support && safe_to_lower) in should_update_pstate_support()
327 else if (!calc_support && !safe_to_lower) in should_update_pstate_support()
A Ddchubbub.h152 bool safe_to_lower);
A Dclk_mgr.h234 bool safe_to_lower);
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_hubbub.c57 bool safe_to_lower) in hubbub201_program_watermarks() argument
62 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
65 if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clk_mgr.c672 bool safe_to_lower) in dce_update_clocks() argument
684 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()
690 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce_update_clocks()
699 bool safe_to_lower) in dce11_update_clocks() argument
711 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()
717 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce11_update_clocks()
726 bool safe_to_lower) in dce112_update_clocks() argument
744 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce112_update_clocks()
753 bool safe_to_lower) in dce12_update_clocks() argument
764 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce12_update_clocks()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
A Ddce120_clk_mgr.c86 bool safe_to_lower) in dce12_update_clocks() argument
97 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks()
112 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { in dce12_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
A Ddce60_clk_mgr.c122 bool safe_to_lower) in dce60_update_clocks() argument
134 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce60_update_clocks()
140 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce60_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c101 struct dc_state *context, int ref_dpp_clk, bool safe_to_lower) in rn_update_clocks_update_dpp_dto() argument
118 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in rn_update_clocks_update_dpp_dto()
127 bool safe_to_lower) in rn_update_clocks() argument
148 if (safe_to_lower && !dc->debug.disable_48mhz_pwrdwn) { in rn_update_clocks()
176 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
181 if (should_set_clock(safe_to_lower, in rn_update_clocks()
201 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks()
208 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in rn_update_clocks()
221 safe_to_lower); in rn_update_clocks()
231 safe_to_lower); in rn_update_clocks()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c123 bool safe_to_lower) in dcn31_update_clocks() argument
141 if (safe_to_lower) { in dcn31_update_clocks()
189 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
194 if (should_set_clock(safe_to_lower, in dcn31_update_clocks()
206 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn31_update_clocks()
213 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn31_update_clocks()
225 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
233 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn31_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
A Ddce112_clk_mgr.c197 bool safe_to_lower) in dce112_update_clocks() argument
209 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks()
215 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce112_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c94 bool safe_to_lower) in vg_update_clocks() argument
111 if (safe_to_lower) { in vg_update_clocks()
139 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
144 if (should_set_clock(safe_to_lower, in vg_update_clocks()
156 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in vg_update_clocks()
163 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in vg_update_clocks()
172 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in vg_update_clocks()
180 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in vg_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hubbub.c575 bool safe_to_lower) in hubbub2_program_watermarks() argument
583 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
586 if (hubbub1_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
596 safe_to_lower = true; in hubbub2_program_watermarks()
598 hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); in hubbub2_program_watermarks()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hubbub.c100 bool safe_to_lower) in hubbub3_program_watermarks() argument
105 if (hubbub21_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
108 if (hubbub21_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
111 if (hubbub21_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
A Ddce110_clk_mgr.c251 bool safe_to_lower) in dce11_update_clocks() argument
263 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()
269 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce11_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
A Ddce_clk_mgr.c397 bool safe_to_lower) in dce_update_clocks() argument
409 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()
415 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce_update_clocks()

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