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Searched refs:sar (Results 1 – 25 of 119) sorted by relevance

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/linux/drivers/clk/mvebu/
A Dorion.c30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
130 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_clk_ratio()
174 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) & in mv88f5281_get_cpu_freq()
187 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) & in mv88f5281_get_clk_ratio()
225 u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) & in mv88f6183_get_tclk_freq()
240 u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) & in mv88f6183_get_cpu_freq()
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A Dkirkwood.c86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
167 void __iomem *sar, int id, int *mult, int *div) in mv88f6180_get_clk_ratio() argument
179 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & in mv88f6180_get_clk_ratio()
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A Darmada-370.c45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
A Darmada-39x.c45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
A Ddove.c87 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument
89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq()
106 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument
108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq()
126 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
A Darmada-xp.c48 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
68 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
124 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
A Dcommon.h28 u32 (*get_tclk_freq)(void __iomem *sar);
29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 u32 (*get_refclk_freq)(void __iomem *sar);
32 bool (*is_sscg_enabled)(void __iomem *sar);
A Darmada-375.c50 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) in armada_375_get_tclk_freq() argument
54 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) & in armada_375_get_tclk_freq()
71 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) in armada_375_get_cpu_freq() argument
75 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_cpu_freq()
115 void __iomem *sar, int id, int *mult, int *div) in armada_375_get_clk_ratio() argument
117 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_clk_ratio()
A Darmada-38x.c37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
A Dmv98dx3236.c44 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument
68 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_cpu_freq()
118 void __iomem *sar, int id, int *mult, int *div) in mv98dx3236_get_clk_ratio() argument
120 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_clk_ratio()
/linux/Documentation/devicetree/bindings/sound/
A Dnau8824.txt29 - nuvoton,sar-threshold-num: Number of buttons supported
35 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
37 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
80 nuvoton,sar-threshold-num = <4>;
81 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
82 nuvoton,sar-hysteresis = <0>;
83 nuvoton,sar-voltage = <6>;
84 nuvoton,sar-compare-time = <1>;
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A Dnau8825.txt33 - nuvoton,sar-threshold-num: Number of buttons supported
39 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
41 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
92 nuvoton,sar-threshold-num = <4>;
93 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
94 nuvoton,sar-hysteresis = <1>;
95 nuvoton,sar-voltage = <0>;
96 nuvoton,sar-compare-time = <0>;
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/linux/drivers/net/wireless/realtek/rtw89/
A Dsar.c36 _d->sar._cfg_name = *(_cfg_data); \
37 _d->sar.src = _s; \
55 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_query_sar()
78 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_print_sar()
109 const struct rtw89_sar_cfg_common *sar) in rtw89_apply_sar_common() argument
116 src = rtwdev->sar.src; in rtw89_apply_sar_common()
155 const struct cfg80211_sar_specs *sar) in rtw89_ops_set_sar_specs() argument
166 if (sar->type != NL80211_SAR_TYPE_POWER) in rtw89_ops_set_sar_specs()
171 for (i = 0; i < sar->num_sub_specs; i++) { in rtw89_ops_set_sar_specs()
172 idx = sar->sub_specs[i].freq_range_index; in rtw89_ops_set_sar_specs()
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/linux/arch/sh/drivers/dma/
A Ddma-g2.c97 if (chan->sar & 31) { in g2_xfer_dma()
98 printk("g2dma: unaligned source 0x%lx\n", chan->sar); in g2_xfer_dma()
117 flush_icache_range((unsigned long)chan->sar, chan->count); in g2_xfer_dma()
122 g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0; in g2_xfer_dma()
/linux/arch/parisc/kernel/
A Dkgdb.c80 gr->sar = regs->sar; in pt_regs_to_gdb_regs()
111 regs->sar = gr->sar; in gdb_regs_to_pt_regs()
A Dperf_asm.S154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
A Dsignal32.c100 regs->sar = ((u64)compat_regt << 32) | (u64)compat_reg; in restore_sigcontext32()
102 DBG(2,"restore_sigcontext32: sar is %#lx\n", regs->sar); in restore_sigcontext32()
238 compat_reg = (compat_uint_t)(regs->sar); in setup_sigcontext32()
242 compat_reg = (compat_uint_t)(regs->sar >> 32); in setup_sigcontext32()
A Dtoc.c32 regs->sar = (unsigned long)toc->cr[11]; in toc20_to_pt_regs()
55 regs->sar = toc->cr[11]; in toc11_to_pt_regs()
A Dptrace.c443 case RI(sar): return regs->sar; in get_reg()
489 case RI(sar): regs->sar = val; in set_reg()
707 REG_OFFSET_NAME(sar),
/linux/arch/parisc/include/uapi/asm/
A Dptrace.h35 unsigned long sar; /* CR11 */ member
56 unsigned long sar; /* CR11 */ member
/linux/arch/parisc/lib/
A Dlusercopy.S295 shrpw a2, a3, %sar, t0
301 shrpw a3, a0, %sar, t0
307 shrpw a0, a1, %sar, t0
313 shrpw a1, a2, %sar, t0
320 shrpw a2, a3, %sar, t0
/linux/drivers/dma/dw-edma/
A Ddw-edma-v0-core.c326 SET_LL_64(&lli[i].sar.reg, child->sar); in dw_edma_v0_core_write_chunk()
328 SET_LL_32(&lli[i].sar.lsb, lower_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
329 SET_LL_32(&lli[i].sar.msb, upper_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
A Ddw-edma-v0-regs.h37 } sar; member
211 } sar; member
/linux/arch/xtensa/kernel/
A Dptrace.c51 .sar = regs->sar, in gpr_get()
91 regs->sar = newregs.sar; in gpr_set()
324 tmp = regs->sar; in ptrace_peekusr()
/linux/drivers/dma/
A Didma64.c234 u64 sar, dar; in idma64_hw_desc_fill() local
240 sar = hw->phys; in idma64_hw_desc_fill()
244 src_width = __ffs(sar | hw->len | 4); in idma64_hw_desc_fill()
247 sar = config->src_addr; in idma64_hw_desc_fill()
255 lli->sar = sar; in idma64_hw_desc_fill()

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