Searched refs:sbus_readl (Results 1 – 21 of 21) sorted by relevance
262 sbus_readl(tregs + TCVR_MPAL); in idle_transceiver()264 sbus_readl(tregs + TCVR_MPAL); in idle_transceiver()274 sbus_readl(tregs + TCVR_MPAL); in write_tcvr_bit()277 sbus_readl(tregs + TCVR_MPAL); in write_tcvr_bit()282 sbus_readl(tregs + TCVR_MPAL); in write_tcvr_bit()285 sbus_readl(tregs + TCVR_MPAL); in write_tcvr_bit()297 sbus_readl(tregs + TCVR_MPAL); in read_tcvr_bit()300 sbus_readl(tregs + TCVR_MPAL); in read_tcvr_bit()304 sbus_readl(tregs + TCVR_MPAL); in read_tcvr_bit()462 sbus_readl(tregs + TCVR_MPAL); in bigmac_tcvr_init()[all …]
69 u32 tmp = sbus_readl(gregs + GLOB_CTRL); in qec_global_reset()110 u32 tmp = sbus_readl(cregs + CREG_CTRL); in qe_stop()168 tmp = qep->channel * sbus_readl(gregs + GLOB_MSIZE); in qe_init()172 tmp = sbus_readl(cregs + CREG_RXRBUFPTR) + in qe_init()173 sbus_readl(gregs + GLOB_RSIZE); in qe_init()475 qec_status = sbus_readl(qecp->gregs + GLOB_STAT); in qec_interrupt()481 qe_status = sbus_readl(qep->qcregs + CREG_STAT); in qec_interrupt()786 ctrl = sbus_readl(qecp->gregs + GLOB_CTRL); in get_qec()
193 return sbus_readl(reg); in sbus_hme_read32()260 sbus_readl(__reg)
240 if (UCTRL_STAT_TXNF_STA & sbus_readl(&driver->regs->uctrl_stat)) \253 if ((UCTRL_STAT_RXNE_STA & sbus_readl(&driver->regs->uctrl_stat)) == 0) \257 value = sbus_readl(&driver->regs->uctrl_data); \267 stat = sbus_readl(&driver->regs->uctrl_stat); in uctrl_do_txn()268 intr = sbus_readl(&driver->regs->uctrl_intr); in uctrl_do_txn()
202 (sbus_readl(&lx_krn->krn_csr) & LEO_KRN_CSR_PROGRESS) && in leo_wait()236 val = sbus_readl(&par->lc_ss0_usr->csr); in leo_switch_from_graph()246 sbus_writel(sbus_readl(&cursor->cur_misc) & ~LEO_CUR_ENABLE, &cursor->cur_misc); in leo_switch_from_graph()300 val = sbus_readl(&lx_krn->krn_csr); in leo_setcolreg()325 val = sbus_readl(&lx_krn->krn_csr); in leo_blank()335 val = sbus_readl(&lx_krn->krn_csr); in leo_blank()479 val = sbus_readl(&lx_krn->krn_csr); in leo_wid_put()514 val = sbus_readl(&par->ld_ss1->ss1_misc); in leo_init_hw()
276 if (!(sbus_readl(&fbc->s) & 0x10000000)) in cg6_sync()341 val = sbus_readl(&fbc->draw); in cg6_fillrect()383 i = sbus_readl(&fbc->blit); in cg6_copyarea()525 val = sbus_readl(&thc->thc_misc); in cg6_blank()617 conf = sbus_readl(par->fhc); in cg6_init_fix()685 rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK; in cg6_chip_init()687 conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) | in cg6_chip_init()699 mode = sbus_readl(&fbc->mode); in cg6_chip_init()701 i = sbus_readl(&fbc->s); in cg6_chip_init()
193 val = sbus_readl(®s->vid_screenpaint_timectl1); in p9100_blank()203 val = sbus_readl(®s->vid_screenpaint_timectl1); in p9100_blank()
138 u32 tmp = sbus_readl(p); in __tcx_set_control_plane()212 val = sbus_readl(&thc->thc_misc); in tcx_blank()
723 tmp = sbus_readl(dbri->regs + REG0); in dbri_cmdsend()738 sbus_readl(dbri->regs + REG0), in dbri_reset()739 sbus_readl(dbri->regs + REG2), in dbri_reset()740 sbus_readl(dbri->regs + REG8), sbus_readl(dbri->regs + REG9)); in dbri_reset()748 tmp = sbus_readl(dbri->regs + REG0); in dbri_reset()1446 tmp = sbus_readl(dbri->regs + REG0); in cs4215_open()1470 tmp = sbus_readl(dbri->regs + REG0); in cs4215_open()1523 tmp = sbus_readl(dbri->regs + REG0); in cs4215_setctrl()1546 tmp = sbus_readl(dbri->regs + REG0); in cs4215_setctrl()1939 x = sbus_readl(dbri->regs + REG1); in snd_dbri_interrupt()[all …]
1618 csr = sbus_readl(chip->port + APCCSR); in snd_cs4231_sbus_interrupt()1667 csr = sbus_readl(base->regs + APCCSR); in sbus_dma_request()1695 csr = sbus_readl(base->regs + APCCSR); in sbus_dma_prepare()1724 csr = sbus_readl(base->regs + APCCSR); in sbus_dma_enable()1746 return sbus_readl(base->regs + base->dir + APCVA); in sbus_dma_addr()
436 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma()440 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) in init_restart_ledma()444 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma()485 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); in init_restart_lance()494 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_lance()656 *p32++ = sbus_readl(pbuf); in lance_piocopy_to_skb()844 u32 addr = sbus_readl(lp->dregs + DMA_ADDR); in lance_interrupt()856 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); in lance_interrupt()986 csr = sbus_readl(lp->dregs + DMA_CSR); in lance_reset()1434 csr = sbus_readl(lp->dregs + DMA_CSR); in sparc_lance_probe_one()
308 sbus_readl(&timers_global->l10_limit); in sun4m_clear_clock_irq()323 si = sbus_readl(&sun4m_irq_global->pending); in sun4m_nmi()349 sbus_readl(&timers_percpu[cpu]->l14_limit); in sun4m_clear_profile_irq()
142 val = sbus_readl(master_l10_counter); in sbus_cycles_offset()
270 sbus_readl(&sun4d_timers->l10_timer_limit); in sun4d_clear_clock_irq()
56 tmp = sbus_readl(®s->p_csr); in parport_sunbpp_disable_irq()66 tmp = sbus_readl(®s->p_csr); in parport_sunbpp_enable_irq()
75 static inline u32 sbus_readl(const volatile void __iomem *addr) in sbus_readl() function
300 static inline u32 sbus_readl(const volatile void __iomem *addr) in sbus_readl() function
79 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
32 sbus_readl(esp->dma_regs + (REG))
537 #define fb_readl sbus_readl
634 return sbus_readl(addr); in fore200e_sba_read()
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