Searched refs:sc_hiz_tile_fifo_size (Results 1 – 13 of 13) sorted by relevance
1220 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1240 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1264 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1284 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1460 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | in rv770_gpu_init()
3175 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3197 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3219 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3242 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3264 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3292 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3314 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3336 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3358 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3380 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()[all …]
2083 unsigned sc_hiz_tile_fifo_size; member2110 unsigned sc_hiz_tile_fifo_size; member2138 unsigned sc_hiz_tile_fifo_size; member2171 unsigned sc_hiz_tile_fifo_size; member2202 unsigned sc_hiz_tile_fifo_size; member
911 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()985 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()1188 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) | in cayman_gpu_init()
3111 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3128 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3146 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3163 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3180 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3315 SC_HIZ_TILE_FIFO_SIZE(rdev->config.si.sc_hiz_tile_fifo_size) | in si_gpu_init()
3190 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3207 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3224 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3243 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3378 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) | in cik_gpu_init()
158 unsigned sc_hiz_tile_fifo_size; member
1598 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1615 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1632 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1649 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1666 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1747 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
1715 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1732 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1747 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1762 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1779 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1796 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1813 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1830 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()3840 (adev->gfx.config.sc_hiz_tile_fifo_size << in gfx_v8_0_constants_init()
2016 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4299 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4316 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4333 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4352 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()
2160 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2168 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2178 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2193 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2205 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2215 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v9_0_gpu_early_init()2226 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()
743 config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; in amdgpu_debugfs_gca_config_read()
4672 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4685 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4695 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v10_0_gpu_early_init()
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