set_hard_min_dcfclk_by_freq (reference) in projects: linux

Searched refs:set_hard_min_dcfclk_by_freq (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A D	rv1_clk_mgr.c	`265 pp_smu->set_hard_min_dcfclk_by_freq && in rv1_update_clocks() 268 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks() 285 pp_smu->set_hard_min_dcfclk_by_freq && in rv1_update_clocks() 288 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()`
/linux/drivers/gpu/drm/amd/display/dc/
A D	dm_pp_smu.h	`118 void (set_hard_min_dcfclk_by_freq)(struct pp_smu pp, int mhz); member 178 enum pp_smu_status (set_hard_min_dcfclk_by_freq)(struct pp_smu pp, int Mhz); member`
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A D	dcn20_clk_mgr.c	`265 if (pp_smu && pp_smu->set_hard_min_dcfclk_by_freq) in dcn2_update_clocks() 266 …pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz… in dcn2_update_clocks()`
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A D	amdgpu_dm_pp_smu.c	`839 funcs->rv_funcs.set_hard_min_dcfclk_by_freq = in dm_pp_get_funcs() 848 funcs->nv_funcs.set_hard_min_dcfclk_by_freq = in dm_pp_get_funcs()`

Completed in 8 milliseconds