set_min_deep_sleep_dcfclk (reference) in projects: linux

Searched refs:set_min_deep_sleep_dcfclk (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A D	rv1_clk_mgr.c	`266 pp_smu->set_min_deep_sleep_dcfclk) { in rv1_update_clocks() 269 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks() 286 pp_smu->set_min_deep_sleep_dcfclk) { in rv1_update_clocks() 289 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_k… in rv1_update_clocks()`
/linux/drivers/gpu/drm/amd/display/dc/
A D	dm_pp_smu.h	`124 void (set_min_deep_sleep_dcfclk)(struct pp_smu pp, int mhz); member 184 enum pp_smu_status (set_min_deep_sleep_dcfclk)(struct pp_smu pp, int Mhz); member`
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A D	dcn20_clk_mgr.c	`272 if (pp_smu && pp_smu->set_min_deep_sleep_dcfclk) in dcn2_update_clocks() 273 …pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_… in dcn2_update_clocks()`
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A D	amdgpu_dm_pp_smu.c	`837 funcs->rv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs() 850 funcs->nv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()`

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