Searched refs:slcr (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/reset/ |
| A D | reset-zynq.c | 21 struct regmap *slcr; member
40 return regmap_update_bits(priv->slcr, in zynq_reset_assert()
57 return regmap_update_bits(priv->slcr, in zynq_reset_deassert()
76 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), ®); in zynq_reset_status()
99 priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in zynq_reset_probe()
101 if (IS_ERR(priv->slcr)) { in zynq_reset_probe()
103 return PTR_ERR(priv->slcr); in zynq_reset_probe()
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| /linux/drivers/fpga/ |
| A D | zynq-fpga.c | 127 struct regmap *slcr; member
286 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_init()
290 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
293 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
513 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_complete()
517 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_complete()
571 priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, in zynq_fpga_probe()
573 if (IS_ERR(priv->slcr)) { in zynq_fpga_probe()
575 return PTR_ERR(priv->slcr); in zynq_fpga_probe()
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| /linux/arch/arm/boot/dts/ |
| A D | zynq-7000.dtsi | 296 slcr: slcr@f8000000 { label
299 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
324 syscon = <&slcr>;
330 syscon = <&slcr>;
359 syscon = <&slcr>;
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| /linux/Documentation/devicetree/bindings/reset/ |
| A D | zynq-reset.txt | 10 - syscon: <&slcr>
21 syscon = <&slcr>;
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| /linux/drivers/clk/zynq/ |
| A D | clkc.c | 581 struct device_node *slcr; in zynq_clock_init() local
595 slcr = of_get_parent(np); in zynq_clock_init()
597 if (slcr->data) { in zynq_clock_init()
598 zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; in zynq_clock_init()
601 of_node_put(slcr); in zynq_clock_init()
607 of_node_put(slcr); in zynq_clock_init()
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| /linux/arch/arm/mach-zynq/ |
| A D | Makefile | 7 obj-y := common.o slcr.o pm.o
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| /linux/Documentation/devicetree/bindings/fpga/ |
| A D | xilinx-zynq-fpga-mgr.yaml | 51 syscon = <&slcr>;
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| A D | fpga-region.txt | 357 syscon = <&slcr>;
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| A D | xlnx,zynq-pinctrl.yaml | 183 syscon = <&slcr>;
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| /linux/drivers/net/ethernet/mellanox/mlxsw/ |
| A D | reg.h | 1377 MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
1391 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1400 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1412 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1472 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1478 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1482 MLXSW_REG_ZERO(slcr, payload); in mlxsw_reg_slcr_pack()
12390 MLXSW_REG(slcr),
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| A D | spectrum.c | 2508 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); in mlxsw_sp_lag_init()
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