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Searched refs:slice_mask (Results 1 – 23 of 23) sorted by relevance

/linux/arch/powerpc/mm/
A Dslice.c61 struct slice_mask *ret) in slice_range_to_mask()
395 const struct slice_mask *src) in slice_copy_mask()
404 const struct slice_mask *src1, in slice_or_mask()
405 const struct slice_mask *src2) in slice_or_mask()
433 struct slice_mask good_mask; in slice_get_unmapped_area()
434 struct slice_mask potential_mask; in slice_get_unmapped_area()
435 const struct slice_mask *maskp; in slice_get_unmapped_area()
684 struct slice_mask *mask; in slice_init_new_context_exec()
732 struct slice_mask mask; in slice_set_range_psize()
763 const struct slice_mask *maskp; in slice_is_hugepage_only_range()
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/linux/drivers/gpu/drm/i915/gt/
A Dintel_sseu.c126 sseu->slice_mask |= BIT(s); in gen11_compute_sseu_info()
245 sseu->slice_mask = BIT(0); in cherryview_sseu_info_init()
322 if (!(sseu->slice_mask & BIT(s))) in gen9_sseu_info_init()
435 if (!(sseu->slice_mask & BIT(s))) in bdw_sseu_info_init()
503 sseu->slice_mask = BIT(0); in hsw_sseu_info_init()
507 sseu->slice_mask = BIT(0); in hsw_sseu_info_init()
511 sseu->slice_mask = BIT(0) | BIT(1); in hsw_sseu_info_init()
692 hweight8(sseu->slice_mask), sseu->slice_mask); in intel_sseu_dump()
734 u16 slice_mask = 0; in intel_slicemask_from_dssmask() local
741 slice_mask |= BIT(i); in intel_slicemask_from_dssmask()
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A Dintel_sseu_debugfs.c40 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
91 sseu->slice_mask |= BIT(s); in gen11_sseu_device_status()
144 sseu->slice_mask |= BIT(s); in gen9_sseu_device_status()
183 sseu->slice_mask = slice_info & GEN8_LSLICESTAT_MASK; in bdw_sseu_device_status()
185 if (sseu->slice_mask) { in bdw_sseu_device_status()
187 for (s = 0; s < fls(sseu->slice_mask); s++) in bdw_sseu_device_status()
194 for (s = 0; s < fls(sseu->slice_mask); s++) { in bdw_sseu_device_status()
211 sseu->slice_mask); in i915_print_sseu_info()
213 hweight8(sseu->slice_mask)); in i915_print_sseu_info()
216 for (s = 0; s < fls(sseu->slice_mask); s++) { in i915_print_sseu_info()
A Dintel_sseu.h33 u8 slice_mask; member
60 u8 slice_mask; member
70 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
A Dintel_workarounds.c989 GEM_BUG_ON(hweight8(sseu->slice_mask) > 1); in icl_wa_init_mcr()
1018 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
1051 slice_mask = intel_slicemask_from_dssmask(dss_mask, GEN_DSS_PER_GSLICE); in xehp_init_mcr()
1064 if (slice_mask & lncf_mask) { in xehp_init_mcr()
1065 slice_mask &= lncf_mask; in xehp_init_mcr()
1070 if (slice_mask & gt->info.mslice_mask) { in xehp_init_mcr()
1071 slice_mask &= gt->info.mslice_mask; in xehp_init_mcr()
1075 slice = __ffs(slice_mask); in xehp_init_mcr()
A Dintel_engine_types.h585 ((GRAPHICS_VER(dev_priv___) == 7 ? 1 : ((sseu___)->slice_mask)) & BIT(slice___))
/linux/arch/powerpc/include/asm/book3s/64/
A Dmmu-hash.h701 struct slice_mask { struct
714 struct slice_mask mask_64k; argument
716 struct slice_mask mask_4k;
718 struct slice_mask mask_16m;
719 struct slice_mask mask_16g;
A Dmmu.h166 static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) in slice_mask_for_size()
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_context.c954 if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS)) in intel_context_set_gem()
1828 if (!user->slice_mask || !user->subslice_mask || in i915_gem_user_to_context_sseu()
1840 if (overflows_type(user->slice_mask, context->slice_mask) || in i915_gem_user_to_context_sseu()
1849 if (user->slice_mask & ~device->slice_mask) in i915_gem_user_to_context_sseu()
1858 context->slice_mask = user->slice_mask; in i915_gem_user_to_context_sseu()
1865 unsigned int hw_s = hweight8(device->slice_mask); in i915_gem_user_to_context_sseu()
1867 unsigned int req_s = hweight8(context->slice_mask); in i915_gem_user_to_context_sseu()
2327 user_sseu.slice_mask = ce->sseu.slice_mask; in get_sseu()
/linux/drivers/gpu/drm/i915/
A Di915_query.c45 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
47 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
76 &sseu->slice_mask, slice_length)) in query_topology_info()
A Di915_pci.c646 .dbuf.slice_mask = BIT(DBUF_S1)
681 .dbuf.slice_mask = BIT(DBUF_S1), \
816 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
938 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
A Di915_getparam.c149 value = sseu->slice_mask; in i915_getparam_ioctl()
A Dintel_device_info.h211 u8 slice_mask; member
A Dintel_pm.c4054 hweight8(INTEL_INFO(dev_priv)->dbuf.slice_mask); in intel_dbuf_slice_size()
4063 if (!slice_mask) { in skl_ddb_entry_for_slices()
4069 ddb->start = (ffs(slice_mask) - 1) * slice_size; in skl_ddb_entry_for_slices()
4070 ddb->end = fls(slice_mask) * slice_size; in skl_ddb_entry_for_slices()
4080 if (slice_mask & (BIT(DBUF_S1) | BIT(DBUF_S2))) in mbus_ddb_offset()
4081 slice_mask = BIT(DBUF_S1); in mbus_ddb_offset()
4083 slice_mask = BIT(DBUF_S3); in mbus_ddb_offset()
4095 u8 slice_mask = 0; in skl_ddb_dbuf_slice_mask() local
4108 slice_mask |= BIT(start_slice); in skl_ddb_dbuf_slice_mask()
4112 return slice_mask; in skl_ddb_dbuf_slice_mask()
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A Di915_perf.c2816 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
/linux/drivers/crypto/qat/qat_common/
A Dicp_qat_fw_loader_handle.h19 unsigned int slice_mask; member
A Dqat_hal.c811 handle->hal_handle->slice_mask = hw_data->accel_mask; in qat_hal_chip_init()
/linux/drivers/gpu/drm/i915/gem/selftests/
A Di915_gem_context.c1143 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
1200 hweight32(sseu.slice_mask), spin); in __sseu_test()
1245 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
1256 pg_sseu.slice_mask = 1; in __igt_ctx_sseu()
1262 hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
1263 hweight32(pg_sseu.slice_mask)); in __igt_ctx_sseu()
/linux/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_ads.c513 hweight8(gt->info.sseu.slice_mask); in __guc_ads_init()
/linux/drivers/gpu/drm/i915/display/
A Dintel_display.h193 for_each_if(INTEL_INFO(__dev_priv)->dbuf.slice_mask & BIT(__slice))
A Dintel_display_power.c5214 u8 slice_mask = INTEL_INFO(dev_priv)->dbuf.slice_mask; in gen9_dbuf_slices_update() local
5217 drm_WARN(&dev_priv->drm, req_slices & ~slice_mask, in gen9_dbuf_slices_update()
5219 req_slices, slice_mask); in gen9_dbuf_slices_update()
/linux/tools/include/uapi/drm/
A Di915_drm.h1947 __u64 slice_mask; member
/linux/include/uapi/drm/
A Di915_drm.h1947 __u64 slice_mask; member

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