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Searched refs:socclk_mhz (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c117 .socclk_mhz = 278.0,
129 .socclk_mhz = 278.0,
141 .socclk_mhz = 278.0,
153 .socclk_mhz = 715.0,
165 .socclk_mhz = 953.0,
230 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
277 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn301_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c175 .socclk_mhz = 278.0,
186 .socclk_mhz = 278.0,
197 .socclk_mhz = 278.0,
208 .socclk_mhz = 715.0,
219 .socclk_mhz = 953.0,
230 .socclk_mhz = 278.0,
241 .socclk_mhz = 715.0,
252 .socclk_mhz = 953.0,
1048 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
1571 low_pstate_lvl.socclk_mhz = clk_table->entries[0].socclk_mhz; in construct_low_pstate_lvl()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c242 .socclk_mhz = 560.0,
253 .socclk_mhz = 694.0,
264 .socclk_mhz = 875.0,
275 .socclk_mhz = 1000.0,
286 .socclk_mhz = 1200.0,
298 .socclk_mhz = 1200.0,
353 .socclk_mhz = 560.0,
364 .socclk_mhz = 694.0,
375 .socclk_mhz = 875.0,
386 .socclk_mhz = 1000.0,
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c596 .socclk_mhz = 0,
603 .socclk_mhz = 0,
610 .socclk_mhz = 0,
617 .socclk_mhz = 0,
904 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table, in rn_clk_mgr_helper_populate_bw_params()
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_socbb.h30 uint32_t socclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_structs.h61 double socclk_mhz; member
378 double socclk_mhz; member
A Ddisplay_mode_lib.c258 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz); in dml_log_pipe_params()
A Ddisplay_mode_vba.c265 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
281 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
887 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c512 .socclk_mhz = 0,
519 .socclk_mhz = 0,
526 .socclk_mhz = 0,
533 .socclk_mhz = 0,
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_resource.c149 .socclk_mhz = 1254.0,
160 .socclk_mhz = 1254.0,
171 .socclk_mhz = 1254.0,
182 .socclk_mhz = 1254.0,
193 .socclk_mhz = 1254.0,
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr.h89 unsigned int socclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/dcn302/
A Ddcn302_resource.c1410 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn302_update_bw_bounding_box()
1411 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz; in dcn302_update_bw_bounding_box()
1413 dcn3_02_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn302_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/dcn303/
A Ddcn303_resource.c1338 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn303_update_bw_bounding_box()
1339 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz; in dcn303_update_bw_bounding_box()
1341 dcn3_03_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn303_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c1877 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
2095 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn31_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c2141 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn30_calculate_wm_and_dlg_fp()
2512 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz; in dcn30_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c195 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c598 …bw_params->clk_table.entries[i].socclk_mhz = find_clk_for_voltage(clock_table, clock_table->SocClo… in dcn31_clk_mgr_helper_populate_bw_params()
/linux/drivers/gpu/drm/amd/display/dc/calcs/
A Ddcn_calcs.c498 input->clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()

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