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Searched refs:tcr (Results 1 – 25 of 57) sorted by relevance

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/linux/drivers/clocksource/
A Dtimer-davinci.c87 unsigned int tcr; in davinci_tim12_shutdown() local
89 tcr = DAVINCI_TIMER_ENAMODE_DISABLED << in davinci_tim12_shutdown()
96 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_shutdown()
104 unsigned int tcr; in davinci_tim12_set_oneshot() local
106 tcr = DAVINCI_TIMER_ENAMODE_ONESHOT << in davinci_tim12_set_oneshot()
109 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_set_oneshot()
198 int tcr; in davinci_clocksource_init_tim34() local
200 tcr = DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_clocksource_init_tim34()
202 tcr |= DAVINCI_TIMER_ENAMODE_ONESHOT << in davinci_clocksource_init_tim34()
217 unsigned int tcr; in davinci_clocksource_init_tim12() local
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A Dtimer-keystone.c76 u32 tcr; in keystone_timer_config() local
79 tcr = keystone_timer_readl(TCR); in keystone_timer_config()
80 off = tcr & ~(TCR_ENAMODE_MASK); in keystone_timer_config()
83 tcr |= mask; in keystone_timer_config()
102 keystone_timer_writel(tcr, TCR); in keystone_timer_config()
108 u32 tcr; in keystone_timer_disable() local
110 tcr = keystone_timer_readl(TCR); in keystone_timer_disable()
113 tcr &= ~(TCR_ENAMODE_MASK); in keystone_timer_disable()
114 keystone_timer_writel(tcr, TCR); in keystone_timer_disable()
/linux/include/linux/fsl/bestcomm/
A Dbestcomm_priv.h264 reg = in_be16(&bcom_eng->regs->tcr[task]); in bcom_enable_task()
265 out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE); in bcom_enable_task()
271 u16 reg = in_be16(&bcom_eng->regs->tcr[task]); in bcom_disable_task()
272 out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE); in bcom_disable_task()
337 u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; in bcom_set_task_auto_start() local
338 out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task); in bcom_set_task_auto_start()
344 u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; in bcom_set_tcr_initiator() local
345 out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8)); in bcom_set_tcr_initiator()
/linux/arch/arm/mach-rpc/
A Ddma.c207 int tcr, speed; in iomd_set_dma_speed() local
218 tcr = iomd_readb(IOMD_DMATCR); in iomd_set_dma_speed()
223 tcr = (tcr & ~0x03) | speed; in iomd_set_dma_speed()
227 tcr = (tcr & ~0x0c) | (speed << 2); in iomd_set_dma_speed()
231 tcr = (tcr & ~0x30) | (speed << 4); in iomd_set_dma_speed()
235 tcr = (tcr & ~0xc0) | (speed << 6); in iomd_set_dma_speed()
242 iomd_writeb(tcr, IOMD_DMATCR); in iomd_set_dma_speed()
/linux/arch/arm64/mm/
A Dproc.S420 tcr .req x16
422 mov_q tcr, TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \
461 orr tcr, tcr, x10
464 tcr_clear_errata_bits tcr, x9, x5
470 tcr_set_t1sz tcr, x9
474 tcr_set_t0sz tcr, x9
479 tcr_compute_pa_size tcr, #TCR_IPS_SHIFT, x5, x6
489 orr tcr, tcr, #TCR_HA // hardware Access flag update
493 msr tcr_el1, tcr
501 .unreq tcr
/linux/drivers/iommu/arm/arm-smmu/
A Darm-smmu.h355 u32 tcr[2]; member
386 u32 tcr = FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) | in arm_smmu_lpae_tcr() local
387 FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) | in arm_smmu_lpae_tcr()
388 FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) | in arm_smmu_lpae_tcr()
389 FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) | in arm_smmu_lpae_tcr()
390 FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz); in arm_smmu_lpae_tcr()
397 tcr = (tcr << 16) & ~ARM_SMMU_TCR_A1; in arm_smmu_lpae_tcr()
398 tcr |= ARM_SMMU_TCR_EPD0; in arm_smmu_lpae_tcr()
400 tcr |= ARM_SMMU_TCR_EPD1; in arm_smmu_lpae_tcr()
402 return tcr; in arm_smmu_lpae_tcr()
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A Darm-smmu-qcom.c128 if (cb->tcr[0] & ARM_SMMU_TCR_EPD1) in qcom_adreno_smmu_set_ttbr0_cfg()
134 if ((cb->tcr[0] & ARM_SMMU_TCR_EPD0)) in qcom_adreno_smmu_set_ttbr0_cfg()
138 cb->tcr[0] = arm_smmu_lpae_tcr(&pgtable->cfg); in qcom_adreno_smmu_set_ttbr0_cfg()
141 u32 tcr = cb->tcr[0]; in qcom_adreno_smmu_set_ttbr0_cfg() local
144 if (!(cb->tcr[0] & ARM_SMMU_TCR_EPD0)) in qcom_adreno_smmu_set_ttbr0_cfg()
147 tcr |= arm_smmu_lpae_tcr(pgtbl_cfg); in qcom_adreno_smmu_set_ttbr0_cfg()
148 tcr &= ~(ARM_SMMU_TCR_EPD0 | ARM_SMMU_TCR_EPD1); in qcom_adreno_smmu_set_ttbr0_cfg()
150 cb->tcr[0] = tcr; in qcom_adreno_smmu_set_ttbr0_cfg()
/linux/arch/mips/kernel/
A Dcevt-txx9.c63 __raw_writel(TCR_BASE, &tmrptr->tcr); in txx9_clocksource_init()
68 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9_clocksource_init()
83 __raw_writel(TCR_BASE, &tmrptr->tcr); in txx9tmr_stop_and_clear()
100 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9tmr_set_state_periodic()
148 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9tmr_set_next_event()
211 __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9_tmr_init()
213 __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr); in txx9_tmr_init()
/linux/arch/arm64/include/asm/
A Dmmu_context.h71 unsigned long tcr = read_sysreg(tcr_el1); in __cpu_set_tcr_t0sz() local
73 if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) in __cpu_set_tcr_t0sz()
76 tcr &= ~TCR_T0SZ_MASK; in __cpu_set_tcr_t0sz()
77 tcr |= t0sz << TCR_T0SZ_OFFSET; in __cpu_set_tcr_t0sz()
78 write_sysreg(tcr, tcr_el1); in __cpu_set_tcr_t0sz()
A Dassembler.h363 .macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1
370 bfi \tcr, \tmp0, \pos, #3
650 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
661 bic \tcr, \tcr, \tmp2
/linux/drivers/iommu/
A Dio-pgtable-arm.c829 typeof(&cfg->arm_lpae_s1_cfg.tcr) tcr = &cfg->arm_lpae_s1_cfg.tcr; in arm_64_lpae_alloc_pgtable_s1()
843 tcr->sh = ARM_LPAE_TCR_SH_IS; in arm_64_lpae_alloc_pgtable_s1()
844 tcr->irgn = ARM_LPAE_TCR_RGN_WBWA; in arm_64_lpae_alloc_pgtable_s1()
845 tcr->orgn = ARM_LPAE_TCR_RGN_WBWA; in arm_64_lpae_alloc_pgtable_s1()
849 tcr->sh = ARM_LPAE_TCR_SH_OS; in arm_64_lpae_alloc_pgtable_s1()
850 tcr->irgn = ARM_LPAE_TCR_RGN_NC; in arm_64_lpae_alloc_pgtable_s1()
852 tcr->orgn = ARM_LPAE_TCR_RGN_NC; in arm_64_lpae_alloc_pgtable_s1()
872 tcr->ips = ARM_LPAE_TCR_PS_32_BIT; in arm_64_lpae_alloc_pgtable_s1()
875 tcr->ips = ARM_LPAE_TCR_PS_36_BIT; in arm_64_lpae_alloc_pgtable_s1()
878 tcr->ips = ARM_LPAE_TCR_PS_40_BIT; in arm_64_lpae_alloc_pgtable_s1()
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/linux/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3-sva.c95 u64 tcr, par, reg; in arm_smmu_alloc_shared_cd() local
124 tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, 64ULL - vabits_actual) | in arm_smmu_alloc_shared_cd()
132 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_4K); in arm_smmu_alloc_shared_cd()
135 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_16K); in arm_smmu_alloc_shared_cd()
138 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_64K); in arm_smmu_alloc_shared_cd()
148 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_IPS, par); in arm_smmu_alloc_shared_cd()
151 cd->tcr = tcr; in arm_smmu_alloc_shared_cd()
/linux/arch/arm64/kvm/hyp/nvhe/
A Dtlb.c14 u64 tcr; member
30 val = cxt->tcr = read_sysreg_el1(SYS_TCR); in __tlb_switch_to_guest()
54 write_sysreg_el1(cxt->tcr, SYS_TCR); in __tlb_switch_to_host()
/linux/arch/arm64/kvm/hyp/vhe/
A Dtlb.c15 u64 tcr; member
36 val = cxt->tcr = read_sysreg_el1(SYS_TCR); in __tlb_switch_to_guest()
75 write_sysreg_el1(cxt->tcr, SYS_TCR); in __tlb_switch_to_host()
/linux/drivers/watchdog/
A Dtxx9wdt.c58 &txx9wdt_reg->tcr); in txx9wdt_start()
68 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, in txx9wdt_stop()
69 &txx9wdt_reg->tcr); in txx9wdt_stop()
/linux/arch/powerpc/sysdev/
A Dmpic_timer.c142 u32 tcr; in set_cascade_timer() local
151 tcr = casc_priv->tcr_value | in set_cascade_timer()
153 setbits32(priv->group_tcr, tcr); in set_cascade_timer()
336 u32 tcr; in mpic_free_timer() local
337 tcr = casc_priv->tcr_value | (casc_priv->tcr_value << in mpic_free_timer()
339 clrbits32(priv->group_tcr, tcr); in mpic_free_timer()
/linux/arch/powerpc/platforms/4xx/
A Dgpio.c28 __be32 tcr; member
106 clrbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
139 setbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_out()
/linux/arch/powerpc/include/asm/
A Dreg_booke.h549 #define TCR_GET_WP(tcr) ((((tcr) & 0xC0000000) >> 30) | \ argument
550 (((tcr) & 0x1E0000) >> 15))
552 #define TCR_GET_WP(tcr) (((tcr) & 0xC0000000) >> 30) argument
/linux/drivers/tty/serial/
A Dsunsab.h18 u8 tcr; /* Termination Character Register */ member
49 u8 tcr; member
85 u8 tcr; member
A Ddz.c809 unsigned short csr, tcr, trdy, mask; in dz_console_putchar() local
815 tcr = dz_in(dport, DZ_TCR); in dz_console_putchar()
816 tcr |= 1 << dport->port.line; in dz_console_putchar()
817 mask = tcr; in dz_console_putchar()
838 dz_out(dport, DZ_TCR, tcr); in dz_console_putchar()
/linux/arch/powerpc/kernel/
A Dtime.c734 unsigned int tcr; in start_cpu_decrementer() local
739 tcr = mfspr(SPRN_TCR); in start_cpu_decrementer()
744 tcr &= TCR_WP_MASK; /* Clear all bits except for TCR[WP] */ in start_cpu_decrementer()
745 tcr |= TCR_DIE; /* Enable decrementer */ in start_cpu_decrementer()
746 mtspr(SPRN_TCR, tcr); in start_cpu_decrementer()
/linux/include/linux/
A Dio-pgtable.h107 } tcr; member
126 u32 tcr; member
/linux/drivers/dma/sh/
A Dshdmac.c219 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR); in dmae_set_reg()
291 sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar); in sh_dmae_start_xfer()
389 sh_desc->hw.tcr = *len; in sh_dmae_desc_setup()
422 return sh_desc->hw.tcr - in sh_dmae_get_partial()
464 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) || in sh_dmae_desc_completed()
466 (sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf); in sh_dmae_desc_completed()
/linux/arch/powerpc/kvm/
A Dbooke_emulate.c269 if (vcpu->arch.tcr & TCR_WRC_MASK) { in kvmppc_booke_emulate_mtspr()
271 spr_val |= vcpu->arch.tcr & TCR_WRC_MASK; in kvmppc_booke_emulate_mtspr()
446 *spr_val = vcpu->arch.tcr; in kvmppc_booke_emulate_mfspr()
A Dbooke.c579 u32 period = TCR_GET_WP(vcpu->arch.tcr); in watchdog_next_timeout()
657 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && in kvmppc_watchdog_func()
676 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) in update_timer_ints()
681 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()
1514 sregs->u.e.tcr = vcpu->arch.tcr; in get_sregs_base()
1532 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); in set_sregs_base()
1700 *val = get_reg_val(id, vcpu->arch.tcr); in kvmppc_get_one_reg()
1773 u32 tcr = set_reg_val(id, *val); in kvmppc_set_one_reg() local
1774 kvmppc_set_tcr(vcpu, tcr); in kvmppc_set_one_reg()
1857 vcpu->arch.tcr = new_tcr; in kvmppc_set_tcr()
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