| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_debug.c | 148 plane_state->tiling_info.gfx8.tile_split, in pre_surface_trace()
240 update->plane_info->tiling_info.gfx8.tile_split, in update_surface_trace()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | evergreen_cs.c | 1182 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1186 &tile_split); in evergreen_cs_handle_reg()
1188 ib[idx] |= DB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1446 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1450 &tile_split); in evergreen_cs_handle_reg()
1452 ib[idx] |= CB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1474 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1478 &tile_split); in evergreen_cs_handle_reg()
1480 ib[idx] |= CB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
2363 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_packet3_check() local
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| A D | atombios_crtc.c | 1155 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local
1275 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1285 tile_split_bytes = 64 << tile_split; in dce4_crtc_do_set_base()
1295 tile_split); in dce4_crtc_do_set_base()
1340 fb_format |= EVERGREEN_GRPH_TILE_SPLIT(tile_split); in dce4_crtc_do_set_base()
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| A D | evergreen.c | 1111 unsigned *tile_split) in evergreen_tiling_fields() argument
1116 …*tile_split = (tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MA… in evergreen_tiling_fields()
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| A D | radeon.h | 358 unsigned *tile_split);
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_mem_input.c | 455 GRPH_TILE_SPLIT, info->gfx8.tile_split, in program_tiling()
472 GRPH_TILE_SPLIT, info->gfx8.tile_split, in program_tiling()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_hw_types.h | 343 enum tile_split_values tile_split; member
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_mem_input_v.c | 184 set_reg_field_value(value, info->gfx8.tile_split, in program_tiling()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v8_0.c | 1910 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1915 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v8_0_crtc_do_set_base()
1920 fb_format |= (tile_split << GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT); in dce_v8_0_crtc_do_set_base()
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| A D | dce_v6_0.c | 1937 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1942 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v6_0_crtc_do_set_base()
1947 fb_format |= GRPH_TILE_SPLIT(tile_split); in dce_v6_0_crtc_do_set_base()
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| A D | dce_v10_0.c | 1989 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1994 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v10_0_crtc_do_set_base()
2001 tile_split); in dce_v10_0_crtc_do_set_base()
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| A D | dce_v11_0.c | 2031 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v11_0_crtc_do_set_base() local
2036 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v11_0_crtc_do_set_base()
2043 tile_split); in dce_v11_0_crtc_do_set_base()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.c | 4705 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_gfx8_tiling_info_from_flags() local
4710 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in fill_gfx8_tiling_info_from_flags()
4717 tiling_info->gfx8.tile_split = tile_split; in fill_gfx8_tiling_info_from_flags()
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