| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_resource.c | 815 if (pool->base.timing_generators[i] != NULL) { in dce60_resource_destruct()
816 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce60_resource_destruct()
817 pool->base.timing_generators[i] = NULL; in dce60_resource_destruct()
1035 pool->base.timing_generators[i] = dce60_timing_generator_create( in dce60_construct()
1037 if (pool->base.timing_generators[i] == NULL) { in dce60_construct()
1232 pool->base.timing_generators[i] = dce60_timing_generator_create( in dce61_construct()
1234 if (pool->base.timing_generators[i] == NULL) { in dce61_construct()
1425 pool->base.timing_generators[i] = dce60_timing_generator_create( in dce64_construct()
1427 if (pool->base.timing_generators[i] == NULL) { in dce64_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_resource.c | 820 if (pool->base.timing_generators[i] != NULL) { in dce80_resource_destruct()
821 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce80_resource_destruct()
822 pool->base.timing_generators[i] = NULL; in dce80_resource_destruct()
1046 pool->base.timing_generators[i] = dce80_timing_generator_create( in dce80_construct()
1048 if (pool->base.timing_generators[i] == NULL) { in dce80_construct()
1245 pool->base.timing_generators[i] = dce80_timing_generator_create( in dce81_construct()
1247 if (pool->base.timing_generators[i] == NULL) { in dce81_construct()
1440 pool->base.timing_generators[i] = dce80_timing_generator_create( in dce83_construct()
1442 if (pool->base.timing_generators[i] == NULL) { in dce83_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_hwseq.c | 283 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw()
291 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw()
315 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw()
344 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw()
360 struct timing_generator *tg = res_pool->timing_generators[i]; in dcn201_init_hw()
|
| A D | dcn201_resource.c | 960 if (pool->base.timing_generators[i] != NULL) { in dcn201_resource_destruct()
961 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn201_resource_destruct()
962 pool->base.timing_generators[i] = NULL; in dcn201_resource_destruct()
1247 pool->base.timing_generators[i] = dcn201_timing_generator_create( in dcn201_resource_construct()
1249 if (pool->base.timing_generators[i] == NULL) { in dcn201_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| A D | dce100_resource.c | 772 if (pool->base.timing_generators[i] != NULL) { in dce100_resource_destruct()
773 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce100_resource_destruct()
774 pool->base.timing_generators[i] = NULL; in dce100_resource_destruct()
1077 pool->base.timing_generators[i] = in dce100_resource_construct()
1082 if (pool->base.timing_generators[i] == NULL) { in dce100_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_resource.c | 831 if (pool->base.timing_generators[i] != NULL) { in dce110_resource_destruct()
832 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce110_resource_destruct()
833 pool->base.timing_generators[i] = NULL; in dce110_resource_destruct()
1135 pipe_ctx->stream_res.tg = pool->timing_generators[underlay_idx]; in dce110_acquire_underlay()
1268 pool->timing_generators[pool->pipe_count] = &dce110_tgv->base; in underlay_create()
1441 pool->base.timing_generators[i] = dce110_timing_generator_create( in dce110_resource_construct()
1443 if (pool->base.timing_generators[i] == NULL) { in dce110_resource_construct()
|
| A D | dce110_hw_sequencer.c | 1701 dc->res_pool->timing_generators[i]->funcs->disable_crtc(
1702 dc->res_pool->timing_generators[i]);
1741 tg = dc->res_pool->timing_generators[i];
2679 struct timing_generator *tg = dc->res_pool->timing_generators[i];
|
| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_resource.c | 619 if (pool->base.timing_generators[i] != NULL) { in dce120_resource_destruct()
620 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce120_resource_destruct()
621 pool->base.timing_generators[i] = NULL; in dce120_resource_destruct()
1167 pool->base.timing_generators[j] = in dce120_resource_construct()
1172 if (pool->base.timing_generators[j] == NULL) { in dce120_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| A D | dce112_resource.c | 793 if (pool->base.timing_generators[i] != NULL) { in dce112_resource_destruct()
794 kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i])); in dce112_resource_destruct()
795 pool->base.timing_generators[i] = NULL; in dce112_resource_destruct()
1322 pool->base.timing_generators[i] = in dce112_resource_construct()
1327 if (pool->base.timing_generators[i] == NULL) { in dce112_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_resource.c | 1005 if (pool->base.timing_generators[i] != NULL) { in dcn10_resource_destruct()
1006 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn10_resource_destruct()
1007 pool->base.timing_generators[i] = NULL; in dcn10_resource_destruct()
1608 pool->base.timing_generators[j] = dcn10_timing_generator_create( in dcn10_resource_construct()
1610 if (pool->base.timing_generators[j] == NULL) { in dcn10_resource_construct()
|
| A D | dcn10_hw_sequencer_debug.c | 427 struct timing_generator *tg = pool->timing_generators[i]; in dcn10_get_otg_states()
494 struct timing_generator *tg = pool->timing_generators[i]; in dcn10_clear_otpc_underflow()
|
| A D | dcn10_hw_sequencer.c | 350 struct timing_generator *tg = pool->timing_generators[i]; in dcn10_log_hw_state()
1273 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn10_init_pipes()
1311 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn10_init_pipes()
3228 struct timing_generator *tg = dc->res_pool->timing_generators[0]; in dcn10_update_pending_status()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| A D | dcn301_resource.c | 1131 if (pool->base.timing_generators[i] != NULL) { in dcn301_destruct()
1132 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn301_destruct()
1133 pool->base.timing_generators[i] = NULL; in dcn301_destruct()
1612 pool->base.timing_generators[j] = dcn301_timing_generator_create(ctx, i); in dcn301_resource_construct()
1613 if (pool->base.timing_generators[j] == NULL) { in dcn301_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| A D | dcn302_resource.c | 1200 if (pool->timing_generators[i] != NULL) { in dcn302_resource_destruct()
1201 kfree(DCN10TG_FROM_TG(pool->timing_generators[i])); in dcn302_resource_destruct()
1202 pool->timing_generators[i] = NULL; in dcn302_resource_destruct()
1666 pool->timing_generators[i] = dcn302_timing_generator_create(ctx, i); in dcn302_resource_construct()
1667 if (pool->timing_generators[i] == NULL) { in dcn302_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| A D | dcn303_resource.c | 1126 if (pool->timing_generators[i] != NULL) { in dcn303_resource_destruct()
1127 kfree(DCN10TG_FROM_TG(pool->timing_generators[i])); in dcn303_resource_destruct()
1128 pool->timing_generators[i] = NULL; in dcn303_resource_destruct()
1597 pool->timing_generators[i] = dcn303_timing_generator_create(ctx, i); in dcn303_resource_construct()
1598 if (pool->timing_generators[i] == NULL) { in dcn303_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.c | 1802 struct timing_generator *tg = dc->res_pool->timing_generators[0]; in dcn20_post_unlock_program_front_end()
1921 optc = dc->res_pool->timing_generators[dwb->otg_inst]; in dcn20_enable_writeback()
2510 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn20_fpga_init_hw()
2517 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn20_fpga_init_hw()
2541 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn20_fpga_init_hw()
2572 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn20_fpga_init_hw()
2588 struct timing_generator *tg = dc->res_pool->timing_generators[i]; in dcn20_fpga_init_hw()
|
| A D | dcn20_resource.c | 1523 if (pool->base.timing_generators[i] != NULL) { in dcn20_resource_destruct()
1524 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn20_resource_destruct()
1525 pool->base.timing_generators[i] = NULL; in dcn20_resource_destruct()
3998 pool->base.timing_generators[i] = dcn20_timing_generator_create( in dcn20_resource_construct()
4000 if (pool->base.timing_generators[i] == NULL) { in dcn20_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_resource.c | 979 if (pool->base.timing_generators[i] != NULL) { in dcn21_resource_destruct()
980 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn21_resource_destruct()
981 pool->base.timing_generators[i] = NULL; in dcn21_resource_destruct()
2184 pool->base.timing_generators[j] = dcn21_timing_generator_create( in dcn21_resource_construct()
2186 if (pool->base.timing_generators[j] == NULL) { in dcn21_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 217 struct timing_generator *timing_generators[MAX_PIPES]; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_resource.c | 1599 if (pool->base.timing_generators[i] != NULL) { in dcn31_resource_destruct()
1600 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn31_resource_destruct()
1601 pool->base.timing_generators[i] = NULL; in dcn31_resource_destruct()
2381 pool->base.timing_generators[i] = dcn31_timing_generator_create( in dcn31_resource_construct()
2383 if (pool->base.timing_generators[i] == NULL) { in dcn31_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_resource.c | 1277 if (pool->base.timing_generators[i] != NULL) { in dcn30_resource_destruct()
1278 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn30_resource_destruct()
1279 pool->base.timing_generators[i] = NULL; in dcn30_resource_destruct()
2784 pool->base.timing_generators[i] = dcn30_timing_generator_create( in dcn30_resource_construct()
2786 if (pool->base.timing_generators[i] == NULL) { in dcn30_resource_construct()
|
| A D | dcn30_hwseq.c | 330 optc = dc->res_pool->timing_generators[dwb->otg_inst]; in dcn30_enable_writeback()
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 1366 split_pipe->stream_res.tg = pool->timing_generators[i]; in acquire_first_split_pipe()
1754 pipe_ctx->stream_res.tg = pool->timing_generators[i]; in acquire_first_free_pipe()
2042 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_resource_from_hw_enabled_state()
2995 struct timing_generator *tg = dc->res_pool->timing_generators[0]; in dc_validate_stream()
|
| A D | dc.c | 1517 tg = dc->res_pool->timing_generators[tg_inst]; in dc_validate_seamless_boot_timing()
|