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/linux/drivers/spi/
A Dspi-loopback-test.c83 .transfers = {
97 .transfers = {
110 .transfers = {
122 .transfers = {
135 .transfers = {
152 .transfers = {
169 .transfers = {
186 .transfers = {
202 .transfers = {
219 .transfers = {
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A Dspi-fsl-espi.c160 first = list_first_entry(&m->transfers, struct spi_transfer, in fsl_espi_check_message()
163 list_for_each_entry(t, &m->transfers, transfer_list) { in fsl_espi_check_message()
198 list_for_each_entry(t, &m->transfers, transfer_list) { in fsl_espi_check_rxskip_mode()
406 espi->m_transfers = &m->transfers; in fsl_espi_trans()
407 espi->tx_t = list_first_entry(&m->transfers, struct spi_transfer, in fsl_espi_trans()
411 espi->rx_t = list_first_entry(&m->transfers, struct spi_transfer, in fsl_espi_trans()
446 list_for_each_entry(t, &m->transfers, transfer_list) { in fsl_espi_do_one_msg()
455 t = list_first_entry(&m->transfers, struct spi_transfer, in fsl_espi_do_one_msg()
A Dspi.c157 SPI_STATISTICS_SHOW(transfers, "%lu");
300 stats->transfers++; in spi_statistics_add_transfer_stats()
1116 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in __spi_map_msg()
1163 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in __spi_unmap_msg()
1194 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in spi_unmap_msg()
1246 list_for_each_entry(xfer, &msg->transfers, in spi_map_msg()
1430 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in spi_transfer_one_message()
1490 &msg->transfers)) { in spi_transfer_one_message()
1903 list_for_each_entry(xfer, &mesg->transfers, transfer_list) in spi_finalize_current_message()
3231 if (rxfer->replaced_after->next == &msg->transfers) { in spi_replace_transfers()
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A Dspi-cavium.c135 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in octeon_spi_transfer_one_message()
137 &msg->transfers); in octeon_spi_transfer_one_message()
/linux/Documentation/i2c/
A Di2c-topology.rst23 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
86 select and/or deselect operations must use I2C transfers to complete
112 number (one, in most cases) of I2C transfers. Unrelated I2C transfers
143 4. M1 (presumably) does some I2C transfers as part of its select.
144 These transfers are normal I2C transfers that locks the parent
162 has to ensure that any and all I2C transfers through that parent
177 pinctrl, regmap or iio, it is essential that any I2C transfers
204 5. If M1 does any I2C transfers (on this root adapter) as part of
205 its select, those transfers must be unlocked I2C transfers so
291 as partial I2C transfers, i.e. garbage or worse. This might cause
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/linux/Documentation/driver-api/dmaengine/
A Dprovider.rst11 They have a given number of channels to use for the DMA transfers, and
44 transfer into smaller sub-transfers.
48 transfers we usually have are not, and want to copy data from
52 DMAEngine, at least for mem2dev transfers, require support for
91 Over time, the need for memory to device transfers arose, and
125 (i.e. excluding mem2mem transfers)
197 available for async transfers.
209 scatter-gather transfers.
221 - The device can handle cyclic transfers.
516 ignored in the slave transfers case.
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A Dpxa_dma.rst19 b) All transfers having asked for confirmation should be signaled
115 This will speed up residue calculation, for large transfers such as video
129 - calling all the transfer callbacks of finished transfers, based on
138 transfers will be scanned for all of their descriptors against the
144 - there are not "acked" transfers (tx0)
/linux/Documentation/usb/
A Dehci.rst59 and interrupt transfers, including requests to USB 1.1 devices through
67 transfers can't share much code with the code for high speed ISO transfers,
74 Transfers of all types can be queued. This means that control transfers
76 ones from another driver, and that interrupt transfers can use periods
88 transactions (interrupt and isochronous transfers). These place some
125 and bulk transfers. Shows each active qh and the qtds
130 and isochronous transfers. Doesn't show qtds.
140 can't, such as "high bandwidth" periodic (interrupt or ISO) transfers.
160 Bulk transfers are most often used where throughput is an issue. It's
165 So more than 50 MByte/sec is available for bulk transfers, when both
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A Dohci.rst22 - interrupt transfers can be larger, and can be queued
29 transfers. Previously, using periods of one frame would risk data loss due
30 to overhead in IRQ processing. When interrupt transfers are queued, those
31 risks can be minimized by making sure the hardware always has transfers to
/linux/Documentation/spi/
A Dpxa2xx.rst10 - SSP PIO and SSP DMA data transfers.
18 the DMA or interrupt driven transfers.
111 FIFO overruns (especially in PIO mode transfers). Good default values are::
121 to determine the correct value. An SSP configured for byte-wide transfers would
176 .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
184 .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
219 transfers. The driver defaults to PIO mode and DMA transfers must be enabled
229 always use PIO transfers
233 use PIO transfers
/linux/Documentation/devicetree/bindings/dma/
A Dst,stm32-dma.yaml20 0x0: no address increment between transfers
21 0x1: increment address between transfers
23 0x0: no address increment between transfers
24 0x1: increment address between transfers
49 managing transfers for STM32 USART/UART.
A Dst_fdma.txt59 0x0: no address increment between transfers
60 0x1: increment address between transfers
64 4. transfers type
A Dadi,axi-dmac.txt33 transfers.
34 - adi,2d: Must be set if the channel supports hardware 2D DMA transfers.
/linux/Documentation/ABI/testing/
A Dsysfs-bus-mdio10 What: /sys/bus/mdio_bus/devices/.../statistics/transfers
11 What: /sys/class/mdio_bus/.../transfers
16 Total number of transfers for this MDIO bus.
48 Total number of transfers for this MDIO bus address.
A Dsysfs-bus-fsi-devices-sbefifo8 ocurred and no transfers have completed since the timeout. A
10 has, more recent transfers have completed successful.
A Dsysfs-module18 Description: Maximum time allowed for periodic transfers per microframe (μs)
21 USB 2.0 sets maximum allowed time for periodic transfers per
/linux/Documentation/core-api/
A Ddma-isa-lpc.rst7 This document describes how to do DMA transfers using the old ISA DMA
22 The second contains the routines specific to ISA DMA transfers. Since
34 (You usually need a special buffer for DMA transfers instead of
69 8-bit transfers and the upper four are for 16-bit transfers.
80 The ability to use 16-bit or 8-bit transfers is _not_ up to you as a
105 be 16-bit aligned for 16-bit transfers) and how many bytes to
/linux/drivers/usb/gadget/udc/
A DKconfig154 zero (for control transfers).
175 supports both full and high speed USB 2.0 data transfers.
215 control transfers).
227 endpoints, as well as endpoint zero (for control transfers).
299 supports both full and high speed USB 2.0 data transfers.
349 both full and high speed USB 2.0 data transfers.
372 supports both full and high speed USB 2.0 data transfers.
382 data transfers.
400 endpoints, plus endpoint zero (for control transfers).
417 supports both full and high speed USB 2.0 data transfers.
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/linux/Documentation/driver-api/usb/
A DURB.rst67 // (IN) buffer used for data transfers
78 // Only for PERIODIC transfers (ISO, INTERRUPT)
150 - Too many queued ISO transfers (``-EAGAIN``)
224 transferred. That's because USB transfers are packetized; it might take
239 How to do isochronous (ISO) transfers?
243 have to set ``urb->interval`` to say how often to make transfers; it's
249 For ISO transfers you also have to fill a :c:type:`usb_iso_packet_descriptor`
275 How to start interrupt (INT) transfers?
278 Interrupt transfers, like isochronous transfers, are periodic, and happen
/linux/Documentation/devicetree/bindings/dma/xilinx/
A Dzynqmp_dma.txt1 Xilinx ZynqMP DMA engine, it does support memory to memory transfers,
2 memory to device and device to memory transfers. It also has flow
/linux/drivers/usb/musb/
A DKconfig145 Enable DMA transfers on UX500 platforms.
151 Enable DMA transfers using Mentor's engine.
157 Enable DMA transfers when TI CPPI DMA is available.
169 Enable DMA transfers on TUSB 6010 when OMAP DMA is available.
/linux/Documentation/driver-api/rapidio/
A Dmport_cdev.rst49 - Allocate/Free contiguous DMA coherent memory buffer for DMA data transfers
51 - Initiate DMA data transfers to/from remote RapidIO devices (RIO_TRANSFER).
75 specific DMA engine support and therefore DMA data transfers mport_cdev driver
109 - Add memory mapped DMA data transfers as an option when RapidIO-specific DMA
/linux/drivers/rapidio/
A DKconfig35 than Maintenance transfers.
44 transfers to/from target RIO devices. RapidIO uses NREAD and
47 capable to perform data transfers to/from RapidIO.
/linux/include/linux/spi/
A Dspi.h63 unsigned long transfers; member
988 struct list_head transfers; member
1025 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1038 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1467 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()
/linux/Documentation/fb/
A Dudlfb.rst15 pixels line-by-line via USB bulk transfers.
17 Because of the efficiency of bulk transfers and a protocol on top that
22 Mode setting, EDID read, etc are other bulk or control transfers. Mode
46 Writes need to be detected and encoded into USB bulk transfers by the CPU.
120 do not transmit. Spends host memory to save USB transfers.

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