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Searched refs:uvd_clocks (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/inc/
A Dpower_state.h162 struct PP_UVD_CLOCKS uvd_clocks; member
A Damdgpu_smu.h197 struct smu_uvd_clocks uvd_clocks; member
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.h130 struct smu10_uvd_clocks uvd_clocks; member
A Dsmu10_hwmgr.c923 smu10_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu10_dpm_get_pp_table_entry()
924 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
A Dsmu8_hwmgr.h146 struct smu8_uvd_clocks uvd_clocks; member
A Dprocesspptables.c758 ps->uvd_clocks.VCLK = le32_to_cpu(pnon_clock_info->ulVCLK); in init_non_clock_fields()
759 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()
761 ps->uvd_clocks.VCLK = 0; in init_non_clock_fields()
762 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
A Dsmu8_hwmgr.c1415 smu8_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu8_dpm_get_pp_table_entry()
1416 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
A Dsmu7_hwmgr.c3596 power_state->uvd_clocks.VCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3597 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3689 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v1()
3690 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()
3837 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v0()
3838 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
A Dvega10_hwmgr.c3143 power_state->uvd_clocks.VCLK = 0; in vega10_get_pp_table_entry_callback_func()
3144 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()
3223 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in vega10_get_pp_table_entry()
3224 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()

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