| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_transform.c | 133 SCL_V_NUM_OF_TAPS, data->taps.v_taps - 1); in setup_scaling_configuration()
166 SCL_V_NUM_OF_TAPS, data->taps.v_taps - 1); in dce60_setup_scaling_configuration()
449 data->taps.v_taps, in dce_transform_set_scaler()
454 data->taps.v_taps, in dce_transform_set_scaler()
534 data->taps.v_taps, in dce60_transform_set_scaler()
539 data->taps.v_taps, in dce60_transform_set_scaler()
1183 if (in_taps->v_taps >= max_num_of_lines) in dce_transform_get_optimal_number_of_taps()
1196 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); in dce_transform_get_optimal_number_of_taps()
1202 if (in_taps->v_taps == 0 in dce_transform_get_optimal_number_of_taps()
1204 && scl_data->taps.v_taps > 1) { in dce_transform_get_optimal_number_of_taps()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_dpp.c | 220 if (in_taps->v_taps == 0) { in dpp201_get_optimal_number_of_taps()
222 scl_data->taps.v_taps = 8; in dpp201_get_optimal_number_of_taps()
224 scl_data->taps.v_taps = 4; in dpp201_get_optimal_number_of_taps()
226 scl_data->taps.v_taps = in_taps->v_taps; in dpp201_get_optimal_number_of_taps()
248 scl_data->taps.v_taps = 1; in dpp201_get_optimal_number_of_taps()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_dpp_dscl.c | 343 v_2tap_hardcode_coef_en = scl_data->taps.v_taps < 3 in dpp1_dscl_set_scl_filter()
345 && (scl_data->taps.v_taps > 1 && scl_data->taps.v_taps_c > 1); in dpp1_dscl_set_scl_filter()
364 scl_data->taps.v_taps, scl_data->ratios.vert); in dpp1_dscl_set_scl_filter()
389 dpp, scl_data->taps.v_taps, in dpp1_dscl_set_scl_filter()
508 int vtaps = scl_data->taps.v_taps; in dpp1_dscl_find_lb_memory_config()
598 SCL_V_NUM_TAPS, scl_data->taps.v_taps - 1, in dpp1_dscl_set_scaler_auto_scale()
787 SCL_V_NUM_TAPS, scl_data->taps.v_taps - 1, in dpp1_dscl_set_scaler_manual_scale()
|
| A D | dcn10_dpp.c | 166 if (in_taps->v_taps == 0) in dpp1_get_optimal_number_of_taps()
167 scl_data->taps.v_taps = 4; in dpp1_get_optimal_number_of_taps()
169 scl_data->taps.v_taps = in_taps->v_taps; in dpp1_get_optimal_number_of_taps()
186 scl_data->taps.v_taps = 1; in dpp1_get_optimal_number_of_taps()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_transform_v.c | 169 set_reg_field_value(value, data->taps.v_taps - 1, in setup_scaling_configuration()
178 if (data->taps.h_taps + data->taps.v_taps > 2) { in setup_scaling_configuration()
561 coeffs_v = get_filter_coeffs_64p(data->taps.v_taps, data->ratios.vert); in dce110_xfmv_set_scaler()
573 data->taps.v_taps, in dce110_xfmv_set_scaler()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_dpp.c | 403 if (in_taps->v_taps == 0) { in dpp3_get_optimal_number_of_taps()
405 scl_data->taps.v_taps = min(dc_fixpt_ceil(dc_fixpt_mul_int(scl_data->ratios.vert, 2)), 8); in dpp3_get_optimal_number_of_taps()
407 scl_data->taps.v_taps = 4; in dpp3_get_optimal_number_of_taps()
409 scl_data->taps.v_taps = in_taps->v_taps; in dpp3_get_optimal_number_of_taps()
457 if (scl_data->taps.v_taps > max_taps_y) in dpp3_get_optimal_number_of_taps()
458 scl_data->taps.v_taps = max_taps_y; in dpp3_get_optimal_number_of_taps()
467 scl_data->taps.v_taps = 1; in dpp3_get_optimal_number_of_taps()
|
| A D | dcn30_resource.c | 1517 dout_wb.wb_vtaps_luma = wb_info->dwb_params.scaler_taps.v_taps; in dcn30_populate_dml_writeback_from_context()
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_debug.c | 86 plane_state->scaling_quality.v_taps, in pre_surface_trace()
290 update->scaling_info->scaling_quality.v_taps, in update_surface_trace()
|
| A D | dc_resource.c | 1026 data->taps.v_taps, in calculate_inits_and_viewports()
|
| /linux/drivers/gpu/drm/amd/display/dc/calcs/ |
| A D | dce_calcs.c | 384 data->v_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1); in calculate_bandwidth()
385 data->v_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1); in calculate_bandwidth()
437 data->v_taps[i] = bw_int_to_fixed(1); in calculate_bandwidth()
546 if (bw_mtn(data->vsr[i], data->v_taps[i])) { in calculate_bandwidth()
582 if (bw_mtn(bw_add(data->v_taps[i], bw_int_to_fixed(1)), data->lb_partitions[i])) { in calculate_bandwidth()
1703 …data->scaler_limits_factor = bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_div(da… in calculate_bandwidth()
2831 data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); in populate_initial_data()
2887 …data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2934 data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); in populate_initial_data()
2986 …data->v_taps[num_displays + 4] = pipe[i].stream->src.height == pipe[i].stream->dst.height ? bw_int… in populate_initial_data()
[all …]
|
| A D | calcs_logger.h | 431 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] v_taps[%d]:%d", i, bw_fixed_to_int(data->v_taps[i])); in print_bw_calcs_data()
|
| A D | dcn_calcs.c | 404 input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps; in pipe_ctx_to_e2e_pipe_params()
1032 v->override_vta_ps[input_idx] = pipe->plane_res.scl_data.taps.v_taps; in dcn_validate_bandwidth()
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_hw_types.h | 607 uint32_t v_taps; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dwb_scl.c | 804 uint32_t v_taps_luma = num_taps.v_taps; in dwb_program_vert_scalar()
|
| A D | dcn20_resource.c | 2338 pipes[pipe_cnt].pipe.scale_taps.vtaps = scl->taps.v_taps; in dcn20_populate_dml_pipes_from_context()
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | dce_calcs.h | 397 struct bw_fixed v_taps[maximum_number_of_surfaces]; member
|