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Searched refs:vco (Results 1 – 25 of 58) sorted by relevance

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/linux/drivers/clk/spear/
A Dclk-vco-pll.c131 if (pll->vco->lock) in clk_pll_recalc_rate()
199 if (vco->lock) in clk_vco_recalc_rate()
206 if (vco->lock) in clk_vco_recalc_rate()
241 if (vco->lock) in clk_vco_set_rate()
263 if (vco->lock) in clk_vco_set_rate()
294 vco = kzalloc(sizeof(*vco), GFP_KERNEL); in clk_register_vco_pll()
295 if (!vco) in clk_register_vco_pll()
305 vco->rtbl = rtbl; in clk_register_vco_pll()
307 vco->lock = lock; in clk_register_vco_pll()
310 pll->vco = vco; in clk_register_vco_pll()
[all …]
A DMakefile6 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
/linux/drivers/clk/versatile/
A Dclk-icst.c82 vco->r = 22; in vco_get()
83 vco->s = 1; in vco_get()
97 vco->r = 46; in vco_get()
98 vco->s = 3; in vco_get()
115 vco->s = 1; in vco_get()
129 vco->r = 22; in vco_get()
136 vco->r = 22; in vco_get()
165 if (vco.s != 1) in vco_set()
182 val = (vco.v & 0xFF) | vco.s << 8; in vco_set()
190 val = ((vco.v & 0xFF) << 12) | (vco.s << 20); in vco_set()
[all …]
A Dicst.c27 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) in icst_hz() argument
29 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); in icst_hz()
30 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; in icst_hz()
49 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; in icst_hz_to_vco() local
66 return vco; in icst_hz_to_vco()
68 vco.s = p->idx2s[i]; in icst_hz_to_vco()
91 vco.v = vd - 8; in icst_hz_to_vco()
92 vco.r = rd - 2; in icst_hz_to_vco()
99 return vco; in icst_hz_to_vco()
/linux/drivers/gpu/drm/i915/display/
A Dintel_cdclk.c1020 dev_priv->cdclk.hw.vco = vco; in skl_dpll0_enable()
1065 int vco = cdclk_config->vco; in skl_set_cdclk() local
1530 dev_priv->cdclk.hw.vco = vco; in bxt_de_pll_enable()
1560 dev_priv->cdclk.hw.vco = vco; in icl_cdclk_pll_enable()
1584 dev_priv->cdclk.hw.vco = vco; in adlp_cdclk_pll_crawl()
1633 int vco = cdclk_config->vco; in bxt_set_cdclk() local
1878 a->vco != b->vco && in intel_cdclk_can_crawl()
1897 a->vco != b->vco || in intel_cdclk_needs_modeset()
1921 a->vco == b->vco && in intel_cdclk_can_cd2x_update()
2372 vco = cdclk_state->logical.vco; in skl_dpll0_vco()
[all …]
A Dintel_dpll.c22 } dot, vco, n, m, m1, m2, p, p1; member
31 .vco = { .min = 908000, .max = 1512000 },
44 .vco = { .min = 908000, .max = 1512000 },
57 .vco = { .min = 908000, .max = 1512000 },
97 .vco = { .min = 1750000, .max = 3500000},
385 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) in intel_pll_is_valid()
1649 int vco; in chv_prepare_pll() local
1657 vco = crtc_state->dpll.vco; in chv_prepare_pll()
1699 if (vco == 5400000) { in chv_prepare_pll()
1704 } else if (vco <= 6200000) { in chv_prepare_pll()
[all …]
/linux/drivers/clk/berlin/
A Dberlin2-avpll.c118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
131 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_enable()
146 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_disable()
184 struct berlin2_avpll_vco *vco; in berlin2_avpll_vco_register() local
187 vco = kzalloc(sizeof(*vco), GFP_KERNEL); in berlin2_avpll_vco_register()
188 if (!vco) in berlin2_avpll_vco_register()
191 vco->base = base; in berlin2_avpll_vco_register()
192 vco->flags = vco_flags; in berlin2_avpll_vco_register()
193 vco->hw.init = &init; in berlin2_avpll_vco_register()
[all …]
/linux/drivers/clk/
A Dclk-si544.c223 u64 vco; in si544_calc_muldiv() local
249 do_div(vco, ls_freq); in si544_calc_muldiv()
250 settings->hs_div = vco; in si544_calc_muldiv()
261 tmp = do_div(vco, FXO); in si544_calc_muldiv()
265 vco = (u64)tmp << 32; in si544_calc_muldiv()
267 do_div(vco, FXO); in si544_calc_muldiv()
281 u64 vco; in si544_calc_center_rate() local
285 vco += (FXO / 2); in si544_calc_center_rate()
286 vco >>= 32; in si544_calc_center_rate()
292 do_div(vco, d); in si544_calc_center_rate()
[all …]
A Dclk-lmk04832.c257 struct clk_hw vco; member
326 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_is_enabled()
341 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_prepare()
359 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_unprepare()
373 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_recalc_rate()
630 lmk->vco.init = &init; in lmk04832_register_vco()
631 return devm_clk_hw_register(lmk->dev, &lmk->vco); in lmk04832_register_vco()
955 parent_names[0] = clk_hw_get_name(&lmk->vco); in lmk04832_register_sclk()
1300 parent_names[0] = clk_hw_get_name(&lmk->vco); in lmk04832_register_clkout()
1505 ret = clk_set_rate(lmk->vco.clk, lmk->vco_rate); in lmk04832_probe()
[all …]
/linux/drivers/clk/pistachio/
A Dclk-pll.c199 u64 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_frac_set_rate() local
210 vco = params->fref; in pll_gf40lp_frac_set_rate()
211 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate()
212 vco = div64_u64(vco, params->refdiv << 24); in pll_gf40lp_frac_set_rate()
214 if (vco < MIN_VCO_FRAC_FRAC || vco > MAX_VCO_FRAC_FRAC) in pll_gf40lp_frac_set_rate()
222 if (val > vco / 16) in pll_gf40lp_frac_set_rate()
224 name, val, vco / 16); in pll_gf40lp_frac_set_rate()
356 u32 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_laint_set_rate() local
367 if (vco < MIN_VCO_LA || vco > MAX_VCO_LA) in pll_gf40lp_laint_set_rate()
375 if (val > vco / 16) in pll_gf40lp_laint_set_rate()
[all …]
/linux/drivers/clk/analogbits/
A Dwrpll-cln28hpc.c229 u64 target_vco_rate, delta, best_delta, f_pre_div, vco, vco_pre; in wrpll_configure_for_rate() local
283 vco = vco_pre * f; in wrpll_configure_for_rate()
286 if (vco > target_vco_rate) { in wrpll_configure_for_rate()
288 vco = vco_pre * f; in wrpll_configure_for_rate()
289 } else if (vco < MIN_VCO_FREQ) { in wrpll_configure_for_rate()
291 vco = vco_pre * f; in wrpll_configure_for_rate()
294 delta = abs(target_rate - vco); in wrpll_configure_for_rate()
/linux/drivers/video/fbdev/matrox/
A Dg450_pll.c106 unsigned int *vco, unsigned int fout) in g450_firstpll() argument
114 *vco = vcomax; in g450_firstpll()
116 *vco = fout; in g450_firstpll()
131 *vco = tvco; in g450_firstpll()
133 return g450_nextpll(minfo, pi, vco, 0xFF0000 | p); in g450_firstpll()
437 unsigned int vco; in __g450_setclk() local
440 vco = g450_mnp2vco(minfo, mnp); in __g450_setclk()
441 delta = pll_freq_delta(fout, g450_vco2f(mnp, vco)); in __g450_setclk()
453 && vco != g450_mnp2vco(minfo, mnparray[idx-1]) in __g450_setclk()
454 && vco < (pi->vcomin * 17 / 16)) { in __g450_setclk()
/linux/drivers/clk/bcm/
A Dclk-iproc-pll.c287 struct iproc_pll_vco_param *vco) in pll_fractional_change_only() argument
303 if (ndiv_int != vco->ndiv_int) in pll_fractional_change_only()
309 if (pdiv != vco->pdiv) in pll_fractional_change_only()
321 unsigned long rate = vco->rate; in pll_set_rate()
331 if (vco->pdiv == 0) in pll_set_rate()
334 ref_freq = parent_rate / vco->pdiv; in pll_set_rate()
407 val |= vco->ndiv_int << ctrl->ndiv_int.shift; in pll_set_rate()
423 val |= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate()
727 const struct iproc_pll_vco_param *vco, in iproc_pll_clk_setup() argument
794 if (vco) { in iproc_pll_clk_setup()
[all …]
/linux/arch/powerpc/boot/
A D4xx.c419 u32 cpu, plb, opb, ebc, vco; in __ibm440eplike_fixup_clocks() local
446 vco = sys_clk * m; in __ibm440eplike_fixup_clocks()
447 clk_a = vco / fwdva; in __ibm440eplike_fixup_clocks()
448 clk_b = vco / fwdvb; in __ibm440eplike_fixup_clocks()
452 vco = 0; in __ibm440eplike_fixup_clocks()
749 u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1; in ibm405ex_fixup_clocks() local
774 vco = (unsigned int)(sys_clk * m); in ibm405ex_fixup_clocks()
778 vco = 0; in ibm405ex_fixup_clocks()
782 cpu = vco / (fwdva * cpudv0); in ibm405ex_fixup_clocks()
784 plb = vco / (fwdva * plb2xdv0 * plbdv0); in ibm405ex_fixup_clocks()
/linux/drivers/gpu/drm/gma500/
A Dcdv_intel_display.c37 .vco = {.min = 1800000, .max = 3600000},
49 .vco = {.min = 1800000, .max = 3600000},
64 .vco = {.min = 1809000, .max = 3564000},
76 .vco = {.min = 1800000, .max = 3600000},
88 .vco = {.min = 1809000, .max = 3564000},
100 .vco = {.min = 1800000, .max = 3600000},
289 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
292 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
295 } else if (clock->vco < 3300000) { in cdv_dpll_set_clock_cdv()
397 clock->dot = clock->vco / clock->p; in cdv_intel_clock()
[all …]
A Dgma_display.h26 int vco; member
41 struct gma_range_t dot, vco, n, m, m1, m2, p, p1; member
A Dpsb_intel_display.c27 .vco = {.min = 1400000, .max = 2800000},
39 .vco = {.min = 1400000, .max = 2800000},
70 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock()
71 clock->dot = clock->vco / clock->p; in psb_intel_clock()
/linux/drivers/clk/mediatek/
A Dclk-pll.c70 u64 vco; in __mtk_pll_recalc_rate() local
78 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()
80 if (pcwfbits && (vco & GENMASK(pcwfbits - 1, 0))) in __mtk_pll_recalc_rate()
83 vco >>= pcwfbits; in __mtk_pll_recalc_rate()
86 vco++; in __mtk_pll_recalc_rate()
88 return ((unsigned long)vco + postdiv - 1) / postdiv; in __mtk_pll_recalc_rate()
/linux/drivers/phy/rockchip/
A Dphy-rockchip-inno-hdmi.c571 u64 vco; in inno_hdmi_phy_rk3228_clk_recalc_rate() local
577 vco = parent_rate * nf; in inno_hdmi_phy_rk3228_clk_recalc_rate()
580 do_div(vco, nd * 5); in inno_hdmi_phy_rk3228_clk_recalc_rate()
593 inno->pixclock = vco; in inno_hdmi_phy_rk3228_clk_recalc_rate()
597 return vco; in inno_hdmi_phy_rk3228_clk_recalc_rate()
718 u64 vco; in inno_hdmi_phy_rk3328_clk_recalc_rate() local
724 vco = parent_rate * nf; in inno_hdmi_phy_rk3328_clk_recalc_rate()
730 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_phy_rk3328_clk_recalc_rate()
734 do_div(vco, nd * 5); in inno_hdmi_phy_rk3328_clk_recalc_rate()
748 inno->pixclock = vco; in inno_hdmi_phy_rk3328_clk_recalc_rate()
[all …]
/linux/drivers/media/i2c/
A Dmt9t112.c278 u32 vco, clk; in mt9t112_clock_info() local
307 vco = 2 * m * ext / (n + 1); in mt9t112_clock_info()
308 enable = ((vco < 384000) || (vco > 768000)) ? "X" : ""; in mt9t112_clock_info()
309 dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable); in mt9t112_clock_info()
311 clk = vco / (p1 + 1) / (p2 + 1); in mt9t112_clock_info()
315 clk = vco / (p3 + 1); in mt9t112_clock_info()
319 clk = vco / (p6 + 1); in mt9t112_clock_info()
323 clk = vco / (p5 + 1); in mt9t112_clock_info()
327 clk = vco / (p4 + 1); in mt9t112_clock_info()
331 clk = vco / (p7 + 1); in mt9t112_clock_info()
/linux/arch/arm/boot/dts/
A Darm-realview-eb.dtsi277 vco-offset = <0x0C>;
285 vco-offset = <0x10>;
293 vco-offset = <0x14>;
301 vco-offset = <0x18>;
309 vco-offset = <0x1c>;
A Darm-realview-pb11mp.dts386 vco-offset = <0x0C>;
394 vco-offset = <0x10>;
402 vco-offset = <0x14>;
410 vco-offset = <0x18>;
418 vco-offset = <0x1c>;
426 vco-offset = <0xd4>;
434 vco-offset = <0xd8>;
A Dintegratorap.dts96 vco-offset = <0x08>;
106 vco-offset = <0x1c>;
127 vco-offset = <0x04>;
137 vco-offset = <0x04>;
A Darm-realview-pbx.dtsi299 vco-offset = <0x0C>;
307 vco-offset = <0x10>;
315 vco-offset = <0x14>;
323 vco-offset = <0x18>;
331 vco-offset = <0x1c>;
/linux/drivers/media/tuners/
A Dmax2165.c224 u8 vco, vco_sub_band, adc; in max2165_debug_status() local
236 vco = autotune >> 6; in max2165_debug_status()
246 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); in max2165_debug_status()

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