Home
last modified time | relevance | path

Searched refs:vgpu_cfg_space (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
A Dcfg_space.c71 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write()
128 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()
143 val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_2]; in map_aperture()
171 val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_0]; in trap_gttmmio()
191 u8 old = vgpu_cfg_space(vgpu)[offset]; in emulate_pci_command_write()
222 u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in emulate_pci_rom_bar_write()
382 memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, in intel_vgpu_init_cfg_space()
386 vgpu_cfg_space(vgpu)[PCI_CLASS_DEVICE] = in intel_vgpu_init_cfg_space()
388 vgpu_cfg_space(vgpu)[PCI_CLASS_PROG] = in intel_vgpu_init_cfg_space()
420 next = vgpu_cfg_space(vgpu)[PCI_CAPABILITY_LIST]; in intel_vgpu_init_cfg_space()
[all …]
A Dmpt.h125 control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset)); in intel_gvt_hypervisor_inject_msi()
126 addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset)); in intel_gvt_hypervisor_inject_msi()
127 data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset)); in intel_gvt_hypervisor_inject_msi()
A Dgvt.h116 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space) macro
471 pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in intel_vgpu_write_pci_bar()
A Dopregion.c513 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI] in intel_vgpu_emulate_opregion_request()

Completed in 10 milliseconds