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Searched refs:vres (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/video/fbdev/via/
A Dviamode.c341 int hres, int vres, int refresh) in get_best_mode() argument
347 if (modes[i].xres != hres || modes[i].yres != vres) in get_best_mode()
358 const struct fb_videomode *viafb_get_best_mode(int hres, int vres, int refresh) in viafb_get_best_mode() argument
361 hres, vres, refresh); in viafb_get_best_mode()
364 const struct fb_videomode *viafb_get_best_rb_mode(int hres, int vres, in viafb_get_best_rb_mode() argument
368 hres, vres, refresh); in viafb_get_best_rb_mode()
A Dviamode.h44 const struct fb_videomode *viafb_get_best_mode(int hres, int vres,
46 const struct fb_videomode *viafb_get_best_rb_mode(int hres, int vres,
A Dioctl.c67 int viafb_ioctl_hotplug(int hres, int vres, int bpp) in viafb_ioctl_hotplug() argument
A Dioctl.h187 int viafb_ioctl_hotplug(int hres, int vres, int bpp);
A Dhw.h654 int viafb_get_refresh(int hres, int vres, u32 float_refresh);
655 void viafb_update_device_setting(int hres, int vres, int bpp, int flag);
A Dhw.c1513 void viafb_update_device_setting(int hres, int vres, int bpp, int flag) in viafb_update_device_setting() argument
1517 viaparinfo->tmds_setting_info->v_active = vres; in viafb_update_device_setting()
1522 viaparinfo->tmds_setting_info->v_active = vres; in viafb_update_device_setting()
1998 int viafb_get_refresh(int hres, int vres, u32 long_refresh) in viafb_get_refresh() argument
2002 best = viafb_get_best_mode(hres, vres, long_refresh); in viafb_get_refresh()
2007 if (hres == 1200 && vres == 900) in viafb_get_refresh()
/linux/drivers/video/fbdev/
A Dvalkyriefb.h86 int vres; member
A Dplatinumfb.h341 int vres; member
A Dplatinumfb.c230 return vmode_attrs[video_mode-1].vres * baseval + 0x1000; in platinum_vram_reqd()
476 pinfo->yres = vmode_attrs[vmode-1].vres; in platinum_var_to_par()
A Dvalkyriefb.c255 return init->vres * pitch; in valkyrie_vram_reqd()
/linux/drivers/net/ethernet/chelsio/cxgb4/
A Dcxgb4_main.c3960 if (adap->vres.ocq.size) { in setup_memwin_rdma()
3973 adap->vres.ocq.start); in setup_memwin_rdma()
5212 adap->vres.ddp.start = val[3]; in adap_init0()
5246 adap->vres.stag.start = val[0]; in adap_init0()
5248 adap->vres.rq.start = val[2]; in adap_init0()
5250 adap->vres.pbl.start = val[4]; in adap_init0()
5261 if (adap->vres.srq.size) { in adap_init0()
5277 adap->vres.qp.start = val[0]; in adap_init0()
5279 adap->vres.cq.start = val[2]; in adap_init0()
5281 adap->vres.ocq.start = val[4]; in adap_init0()
[all …]
A Dcxgb4_uld.h416 #define OCQ_WIN_OFFSET(pdev, vres) \ argument
417 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
A Dcxgb4_uld.c294 ciq_size = 64 + adap->vres.cq.size + adap->tids.nftids; in cfg_queues_uld()
479 i = min_t(int, adap->vres.ncrypto_fc, in setup_sge_txq_uld()
606 lld->vr = &adap->vres; in uld_init()
A Dcudbg_lib.c715 md->base = padap->vres.ocq.start; in cudbg_fill_meminfo()
716 if (padap->vres.ocq.size) in cudbg_fill_meminfo()
717 md->limit = md->base + padap->vres.ocq.size - 1; in cudbg_fill_meminfo()
A Dcxgb4.h1125 struct cxgb4_virt_res vres; member

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